公开(公告)号：US20170103989A1

公开(公告)日：2017-04-13

申请号：US15225425

申请日：2016-08-01

Applicant: Silicon Storage Technology, Inc.

Inventor： CHIEN SHENG SU ,  MANDANA TADAYONI ,  NHAN DO

IPC: H01L27/115 ,  H01L21/02 ,  H01L21/28 ,  H01L29/66 ,  H01L29/423 ,  H01L29/49 ,  H01L21/762 ,  H01L21/84 ,  H01L29/08

CPC classification number: H01L27/11521 ,  H01L21/02532 ,  H01L21/02634 ,  H01L21/28035 ,  H01L21/28273 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/11531 ,  H01L27/11534 ,  H01L27/11536 ,  H01L27/1203 ,  H01L29/0847 ,  H01L29/42328 ,  H01L29/4916 ,  H01L29/66825 ,  H01L29/7881

Abstract: A method of forming a semiconductor device with memory cells and logic devices on the same silicon-on-insulator substrate. The method includes providing a substrate that includes silicon, a first insulation layer directly over the silicon, and a silicon layer directly over the first insulation layer. Silicon is epitaxially grown on the silicon layer in a first (memory) area of the substrate and not in a second (logic device) area of the substrate such that the silicon layer is thicker in the first area of the substrate relative to the second area of the substrate. Memory cells are formed in the first area of the substrate, and logic devices are formed in the second area of the substrate.