公开(公告)号：US09275748B2

公开(公告)日：2016-03-01

申请号：US14190010

申请日：2014-02-25

Applicant: Silicon Storage Technology, Inc.

Inventor： Nhan Do ,  Steven Malcolm Lemke ,  Jinho Kim ,  Jong-Won Yoo ,  Alexander Kotov ,  Yuri Tkachev

IPC: G11C16/26 ,  G11C16/14 ,  G11C16/04 ,  H01L21/28 ,  H01L29/788 ,  H01L27/115 ,  H01L29/423

CPC classification number: G11C16/26 ,  G11C16/0408 ,  G11C16/0425 ,  G11C16/0433 ,  G11C16/10 ,  G11C16/14 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42328 ,  H01L29/7881

Abstract: A method of reading a memory device having rows and columns of memory cells formed on a substrate, where each memory cell includes spaced apart first and second regions with a channel region therebetween, a floating gate disposed over a first portion of the channel region, a select gate disposed over a second portion of the channel region, a control gate disposed over the floating gate, and an erase gate disposed over the first region. The method includes placing a small positive voltage on the unselected source lines, and/or a small negative voltage on the unselected word lines, during the read operation to suppress sub-threshold leakage and thereby improve read performance.

Abstract translation: 一种读取存储器件的方法，所述存储器件具有形成在衬底上的存储器单元的行和列，其中每个存储器单元包括间隔开的第一和第二区域，其间具有通道区域;布置在沟道区域的第一部分上的浮置栅极， 设置在通道区域的第二部分上的选择栅极，设置在浮置栅极上的控制栅极以及设置在第一区域上的擦除栅极。 该方法包括在读取操作期间在未选择的源极线上放置小的正电压和/或在未选择的字线上施加小的负电压以抑制亚阈值泄漏，从而提高读取性能。

公开(公告)号：US20140269062A1

公开(公告)日：2014-09-18

申请号：US14190010

申请日：2014-02-25

Applicant: Silicon Storage Technology, Inc.

Inventor： Nhan Do ,  Steven Malcolm Lemke ,  Jinho Kim ,  Jong-Won Yoo ,  Alexander Kotov ,  Yuri Tkachev

IPC: G11C16/26 ,  G11C16/14 ,  G11C16/04

CPC classification number: G11C16/26 ,  G11C16/0408 ,  G11C16/0425 ,  G11C16/0433 ,  G11C16/10 ,  G11C16/14 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42328 ,  H01L29/7881

Abstract: A method of reading a memory device having rows and columns of memory cells formed on a substrate, where each memory cell includes spaced apart first and second regions with a channel region therebetween, a floating gate disposed over a first portion of the channel region, a select gate disposed over a second portion of the channel region, a control gate disposed over the floating gate, and an erase gate disposed over the first region. The method includes placing a small positive voltage on the unselected source lines, and/or a small negative voltage on the unselected word lines, during the read operation to suppress sub-threshold leakage and thereby improve read performance.

Abstract translation: 一种读取存储器件的方法，所述存储器件具有形成在衬底上的存储器单元的行和列，其中每个存储器单元包括间隔开的第一和第二区域，其间具有通道区域;布置在沟道区域的第一部分上的浮置栅极， 设置在通道区域的第二部分上的选择栅极，设置在浮置栅极上的控制栅极以及设置在第一区域上的擦除栅极。 该方法包括在读取操作期间在未选择的源极线上放置小的正电压和/或在未选择的字线上施加小的负电压以抑制亚阈值泄漏，从而提高读取性能。