公开(公告)号：US06437252B1

公开(公告)日：2002-08-20

申请号：US09741455

申请日：2000-12-19

申请人： Simone Rehm ,  Roland Frech ,  Erich Klink ,  Helmut Virag ,  Thomas-Michael Winkel ,  Wiren Becker ,  Bruce Chamberlin ,  Wai Ma

发明人： Simone Rehm ,  Roland Frech ,  Erich Klink ,  Helmut Virag ,  Thomas-Michael Winkel ,  Wiren Becker ,  Bruce Chamberlin ,  Wai Ma

IPC分类号： H05K102

摘要： Described is a method for minimizing switching noise in the high- and mid-frequency range on printed circuit cards or boards by means of a plurality of surface mounted decoupling capacitors. A novel configuration and implementation of capacitor pads including the connecting vias is also presented. As a result the parasitic inductance of the pads and vias can be significantly reduced. Thus the effectiveness of the decoupling capacitors in the mid and high frequency range can be increased, the voltage drop can be reduced and the system performance can be increased. Several design rules for the new pad via configuration lead to the significant reduction of the parasitic inductance. The proposal is especially important for high integrated system designs on boards and cards combined with increased cycle times.

公开(公告)号：US06442041B2

公开(公告)日：2002-08-27

申请号：US09740280

申请日：2000-12-19

申请人： Simone Rehm ,  Bernd Garden ,  Erich Klink ,  Gisbert Thomke ,  William F. Shutler

发明人： Simone Rehm ,  Bernd Garden ,  Erich Klink ,  Gisbert Thomke ,  William F. Shutler

IPC分类号： H05K702

CPC分类号： H05K1/0224 ,  H01L23/5383 ,  H01L23/5384 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0253 ,  H05K1/0289 ,  H05K1/0298 ,  H05K2201/09681 ,  H01L2924/00

摘要： Disclosed is a multilayer electronics packaging structure, especially for use in a multi chip module. By forming an overlap of signal conductors by the respective mesh conductors, an improved shielding effect is achieved and coupling between signal conductors is reduced. By increasing the via punch pitch such that multiple wiring channels are formed between adjacent vias, wirability is improved and the number of signal distribution layers may be reduced. The new structure thus shows improved electrical properties over the state-of-the-art structures, combined with a cost reduction of about 35%.

摘要翻译： 公开了一种多层电子封装结构，特别适用于多芯片模块。 通过由相应的网状导体形成信号导体的重叠，实现了改进的屏蔽效果，并且减少了信号导线之间的耦合。 通过增加通孔冲压间距，使得在相邻通路之间形成多个布线通道，可改善布线性，并且可以减少信号分布层的数量。 因此，新结构显示出比现有技术结构更好的电性能，同时成本降低约35％。

公开(公告)号：US20140229782A1

公开(公告)日：2014-08-14

申请号：US14259043

申请日：2014-04-22

申请人： Jochen Rueter ,  Simone Rehm ,  Joerg-Walter Mohr ,  Frank Hensel

发明人： Jochen Rueter ,  Simone Rehm ,  Joerg-Walter Mohr ,  Frank Hensel

IPC分类号： G06F11/27

CPC分类号： G06F11/27 ,  G01R31/31919 ,  G01R31/31935

摘要： Embodiments of the present invention provide an automatic test equipment. The automatic test equipment is configured to receive an input signal from a device under test and to write an information describing the input signal to a memory. The automatic test equipment is further configured to read the information describing the input signal from the memory and to provide an output signal for the device under test based on the information describing the input signal read from the memory.

摘要翻译： 本发明的实施例提供一种自动测试设备。 自动测试设备被配置为从被测设备接收输入信号，并将描述输入信号的信息写入存储器。 自动测试设备还被配置为基于描述从存储器读取的输入信号的信息读取描述来自存储器的输入信号的信息，并为被测设备提供输出信号。