Multi-chips with an optical interconnection unit
    1.
    发明授权
    Multi-chips with an optical interconnection unit 有权
    具有光互连单元的多芯片

    公开(公告)号:US08120044B2

    公开(公告)日:2012-02-21

    申请号:US12081277

    申请日:2008-04-14

    摘要: A multi-chip having an optical interconnection unit is provided. The multi-chip having an optical interconnection unit includes a plurality of silicon chips sequentially stacked, a plurality of optical device arrays on a side of each of the plurality of the silicon chips such that the optical device arrays correspond to each other and a wiring electrically connecting the silicon chip and the optical device array attached to a side of the silicon chip, wherein the corresponding optical device arrays forms an optical connection unit by transmitting and receiving an optical signal between the corresponding optical device arrays in different layers. Each of the optical device arrays includes at least one of a light emitting device and a light receiving device.

    摘要翻译: 提供具有光互连单元的多芯片。 具有光学互连单元的多芯片包括顺序层叠的多个硅芯片,多个硅芯片中的每一个的一侧的多个光学器件阵列,使得光学器件阵列彼此对应,并且布线电连接 连接硅芯片和安装在硅芯片一侧的光学器件阵列,其中相应的光学器件阵列通过在不同层中的相应的光学器件阵列之间发送和接收光学信号来形成光学连接单元。 每个光学器件阵列包括发光器件和光接收器件中的至少一个。

    Multi-chips with an optical interconnection unit
    2.
    发明申请
    Multi-chips with an optical interconnection unit 有权
    具有光互连单元的多芯片

    公开(公告)号:US20090114927A1

    公开(公告)日:2009-05-07

    申请号:US12081277

    申请日:2008-04-14

    IPC分类号: H01L31/173

    摘要: A multi-chip having an optical interconnection unit is provided. The multi-chip having an optical interconnection unit includes a plurality of silicon chips sequentially stacked, a plurality of optical device arrays on a side of each of the plurality of the silicon chips such that the optical device arrays correspond to each other and a wiring electrically connecting the silicon chip and the optical device array attached to a side of the silicon chip, wherein the corresponding optical device arrays forms an optical connection unit by transmitting and receiving an optical signal between the corresponding optical device arrays in different layers. Each of the optical device arrays includes at least one of a light emitting device and a light receiving device

    摘要翻译: 提供具有光互连单元的多芯片。 具有光学互连单元的多芯片包括顺序层叠的多个硅芯片,多个硅芯片中的每一个的一侧的多个光学器件阵列,使得光学器件阵列彼此对应,并且布线电连接 连接硅芯片和安装在硅芯片一侧的光学器件阵列,其中相应的光学器件阵列通过在不同层中的相应的光学器件阵列之间发送和接收光学信号来形成光学连接单元。 每个光学器件阵列包括发光器件和光接收器件中的至少一个

    OPTICAL INTERCONNECTION SYSTEM FOR TRANSMITTING AND RECEIVING A THREE-LEVEL SIGNAL AND METHOD OF OPERATING THE SAME
    4.
    发明申请
    OPTICAL INTERCONNECTION SYSTEM FOR TRANSMITTING AND RECEIVING A THREE-LEVEL SIGNAL AND METHOD OF OPERATING THE SAME 审中-公开
    用于发送和接收三级信号的光学互连系统及其操作方法

    公开(公告)号:US20120087673A1

    公开(公告)日:2012-04-12

    申请号:US13323105

    申请日:2011-12-12

    IPC分类号: H04B10/00

    CPC分类号: H04B10/2504

    摘要: Provided is an optical interconnection system that transmits and receives a three-level signal. The optical interconnection system includes a first and a second optical interconnection device that transmits and receives a two-level signal, and a synthesizer that outputs a three-level signal by synthesizing signals from the first and second optical interconnection devices. The optical interconnection system may transmit and receive a three-level signal while using an optical interconnection device that interconnects a two-level signal.

    摘要翻译: 提供了发送和接收三电平信号的光互连系统。 光互连系统包括发送和接收两电平信号的第一和第二光学互连装置,以及通过合成来自第一和第二光学互连装置的信号输出三电平信号的合成器。 光互连系统可以在使用互连两级信号的光互连装置的同时发送和接收三电平信号。

    Optical interconnection system for transmitting and receiving a three-level signal and method of operating the same
    5.
    发明授权
    Optical interconnection system for transmitting and receiving a three-level signal and method of operating the same 有权
    用于发送和接收三电平信号的光互连系统及其操作方法

    公开(公告)号:US08098994B2

    公开(公告)日:2012-01-17

    申请号:US12213151

    申请日:2008-06-16

    IPC分类号: H04B10/12

    CPC分类号: H04B10/2504

    摘要: Provided is an optical interconnection system that transmits and receives a three-level signal. The optical interconnection system includes a first and a second optical interconnection device that transmits and receives a two-level signal, and a synthesizer that outputs a three-level signal by synthesizing signals from the first and second optical interconnection devices. The optical interconnection system may transmit and receive a three-level signal while using an optical interconnection device that interconnects a two-level signal.

    摘要翻译: 提供了发送和接收三电平信号的光互连系统。 光互连系统包括发送和接收两电平信号的第一和第二光学互连装置,以及通过合成来自第一和第二光学互连装置的信号输出三电平信号的合成器。 光互连系统可以在使用互连两级信号的光互连装置的同时发送和接收三电平信号。

    Optical interconnection system for transmitting and receiving a three-level signal and method of operating the same
    6.
    发明申请
    Optical interconnection system for transmitting and receiving a three-level signal and method of operating the same 有权
    用于发送和接收三电平信号的光互连系统及其操作方法

    公开(公告)号:US20090175630A1

    公开(公告)日:2009-07-09

    申请号:US12213151

    申请日:2008-06-16

    IPC分类号: H04B10/00

    CPC分类号: H04B10/2504

    摘要: Provided is an optical interconnection system that transmits and receives a three-level signal. The optical interconnection system includes a first and a second optical interconnection device that transmits and receives a two-level signal, and a synthesizer that outputs a three-level signal by synthesizing signals from the first and second optical interconnection devices. The optical interconnection system may transmit and receive a three-level signal while using an optical interconnection device that interconnects a two-level signal.

    摘要翻译: 提供了发送和接收三电平信号的光互连系统。 光互连系统包括发送和接收两电平信号的第一和第二光学互连装置,以及通过合成来自第一和第二光学互连装置的信号输出三电平信号的合成器。 光互连系统可以在使用互连两级信号的光互连装置的同时发送和接收三电平信号。

    MEMORY SYSTEM, MEMORY TEST SYSTEM AND METHOD OF TESTING MEMORY SYSTEM AND MEMORY TEST SYSTEM
    7.
    发明申请
    MEMORY SYSTEM, MEMORY TEST SYSTEM AND METHOD OF TESTING MEMORY SYSTEM AND MEMORY TEST SYSTEM 有权
    存储器系统,存储器测试系统和测试存储器系统和存储器测试系统的方法

    公开(公告)号:US20120002495A1

    公开(公告)日:2012-01-05

    申请号:US13235162

    申请日:2011-09-16

    IPC分类号: G11C29/00 G01R31/28 G01R31/02

    摘要: A memory test system is disclosed. The memory system includes a memory device, a tester generating a clock signal and a test signal for testing the memory device, and an optical splitting module. The optical splitting module comprises an electrical-optical signal converting unit which converts each of the clock signal and the test signal into an optical signal to output the clock signal and the test signal as an optical clock signal and an optical test signal. The optical splitting unit further comprises an optical signal splitting unit which splits each of the optical clock signal and the optical test signal into n signals (n being at least two), and an optical-electrical signal converting unit which receives the split optical clock signal and the split optical test signal to convert the split optical clock signal and the split optical test signal into electrical signals used in the memory device.

    摘要翻译: 记录测试系统被公开。 存储器系统包括存储器件,产生时钟信号的测试器和用于测试存储器件的测试信号,以及光分离模块。 光分路模块包括电光信号转换单元,其将时钟信号和测试信号中的每一个转换为光信号,以输出时钟信号和测试信号作为光时钟信号和光测试信号。 光分路单元还包括光信号分离单元,其将每个光时钟信号和光测试信号分解为n个信号(n至少为2个);以及光电信号转换单元,其接收分离的光时钟信号 以及分离的光学测试信号,以将分离的光时钟信号和分割的光学测试信号转换成在存储器件中使用的电信号。

    Memory system, memory test system and method of testing memory system and memory test system
    8.
    发明授权
    Memory system, memory test system and method of testing memory system and memory test system 有权
    内存系统,内存测试系统和测试内存系统和内存测试系统的方法

    公开(公告)号:US08023349B2

    公开(公告)日:2011-09-20

    申请号:US12690656

    申请日:2010-01-20

    IPC分类号: G11C7/22

    摘要: A memory test system is disclosed. The memory system includes a memory device, a tester generating a clock signal and a test signal for testing the memory device, and an optical splitting module. The optical splitting module comprises an electrical-optical signal converting unit which converts each of the clock signal and the test signal into an optical signal to output the clock signal and the test signal as an optical clock signal and an optical test signal. The optical splitting unit further comprises an optical signal splitting unit which splits each of the optical clock signal and the optical test signal into n signals (n being at least two), and an optical-electrical signal converting unit which receives the split optical clock signal and the split optical test signal to convert the split optical clock signal and the split optical test signal into electrical signals used in the memory device.

    摘要翻译: 记录测试系统被公开。 存储器系统包括存储器件,产生时钟信号的测试器和用于测试存储器件的测试信号,以及光分离模块。 光分路模块包括电光信号转换单元,其将时钟信号和测试信号中的每一个转换为光信号,以输出时钟信号和测试信号作为光时钟信号和光测试信号。 光分路单元还包括光信号分离单元,其将每个光时钟信号和光测试信号分解为n个信号(n至少为2个);以及光电信号转换单元,其接收分离的光时钟信号 以及分离的光学测试信号,以将分离的光时钟信号和分割的光学测试信号转换成在存储器件中使用的电信号。

    Semiconductor memory devices, controllers, and semiconductor memory systems
    9.
    发明授权
    Semiconductor memory devices, controllers, and semiconductor memory systems 有权
    半导体存储器件,控制器和半导体存储器系统

    公开(公告)号:US08379470B2

    公开(公告)日:2013-02-19

    申请号:US12855409

    申请日:2010-08-12

    IPC分类号: G11C13/04

    CPC分类号: G06F13/4243 G02B6/43

    摘要: A semiconductor memory system includes a controller and a memory device that are optical-interconnected. The controller includes a control logic configured to generate a control signal for controlling the memory device and a transmitter configured to convert the control signal into an optical signal, and output the optical signal. The memory device includes a receiving unit filter configured to convert the optical signal into an electric signal, and the electric signal based on a supply voltage corresponding to a period of the optical signal or the electric signal.

    摘要翻译: 半导体存储器系统包括光学互连的控制器和存储器件。 所述控制器包括:控制逻辑,被配置为产生用于控制所述存储器件的控制信号;以及发射器,被配置为将所述控制信号转换为光信号,并输出所述光信号。 存储装置包括:接收单元滤波器,被配置为基于与光信号或电信号的周期相对应的电源电压将光信号转换为电信号。

    SEMICONDUCTOR MEMORY DEVICE AND SYSTEM
    10.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND SYSTEM 审中-公开
    半导体存储器件和系统

    公开(公告)号:US20100195420A1

    公开(公告)日:2010-08-05

    申请号:US12689040

    申请日:2010-01-18

    IPC分类号: G11C7/00

    CPC分类号: G11C8/18 G11C29/023

    摘要: A semiconductor memory system includes a memory controller and a memory. The memory controller includes a control signal converting unit converting a control signal into a converted control signal including n sequential clock pulses and a target clock pulse activated after a time period has elapsed from a start point of the n sequential clock pulses, and output the converted clock signal, and a controller transmitting unit converting the converted control signal into an optical signal, and transmitting the optical signal to the memory. The memory includes a memory receiving unit converting the optical signal into an electrical signal, and a control signal re-converting unit detecting the time period from the electrical signal, and converting the control signal into a control signal corresponding to the time period.

    摘要翻译: 半导体存储器系统包括存储器控制器和存储器。 存储器控制器包括控制信号转换单元,其将控制信号转换为包括n个连续时钟脉冲的转换控制信号和在从n个连续时钟脉冲的起始点经过时间段之后激活的目标时钟脉冲,并且输出转换的 时钟信号,以及将转换的控制信号转换为光信号的控制器发送单元,并将光信号发送到存储器。 存储器包括将光信号转换成电信号的存储器接收单元和从电信号检测时间段的控制信号重新转换单元,并将控制信号转换成对应于该时间段的控制信号。