公开(公告)号：US08390501B2

公开(公告)日：2013-03-05

申请号：US13096908

申请日：2011-04-28

申请人： Soon-Jyh Chang ,  Guan-Ying Huang ,  Chun-Cheng Liu ,  Chung-Ming Huang ,  Jin-Fu Lin ,  Chih-Haur Huang

发明人： Soon-Jyh Chang ,  Guan-Ying Huang ,  Chun-Cheng Liu ,  Chung-Ming Huang ,  Jin-Fu Lin ,  Chih-Haur Huang

IPC分类号： H03M1/34

CPC分类号： H03M1/462 ,  H03M1/466

摘要： A successive approximation register (SAR) analog-to-digital converter (ADC) is disclosed. A first and second capacitor DACs receive a first and second input signals respectively. A first coarse comparator compares an output of the first capacitor DAC with a window reference voltage, a second coarse comparator compares an output of the second capacitor DAC with the window reference voltage, and a fine comparator compares the output of the first capacitor DAC with the output of the second capacitor DAC. A SAR controller receives outputs of the first and second coarse comparators to determine whether the outputs of the first and second capacitor DACs are within a predictive window determined by the window reference voltage. The SAR controller bypasses at least one phase of analog-to-digital conversion of the SAR ADC when the outputs of the first capacitor DAC and the second capacitor DAC are determined to be within the predictive window. The SAR controller decodes the outputs of the first and second coarse comparators and the fine comparator to obtain a converted output of the SAR ADC.

摘要翻译： 公开了逐次逼近寄存器（SAR）模拟 - 数字转换器（ADC）。 第一和第二电容器DAC分别接收第一和第二输入信号。 第一粗略比较器将第一电容器DAC的输出与窗口参考电压进行比较，第二粗略比较器将第二电容器DAC的输出与窗口参考电压进行比较，精细比较器将第一电容器DAC的输出与 第二电容DAC的输出。 SAR控制器接收第一和第二粗略比较器的输出，以确定第一和第二电容器DAC的输出是否在由窗口参考电压确定的预测窗口内。 当第一电容器DAC和第二电容器DAC的输出被确定为在预测窗口内时，SAR控制器绕过至少一个SAR模数转换阶段。 SAR控制器解码第一和第二粗略比较器和精细比较器的输出，以获得SAR ADC的转换输出。

公开(公告)号：US20130093609A1

公开(公告)日：2013-04-18

申请号：US13272110

申请日：2011-10-12

申请人： Soon-Jyh CHANG ,  Guan-Ying Huang ,  CHUNG-MING HUANG

发明人： Soon-Jyh CHANG ,  Guan-Ying Huang ,  CHUNG-MING HUANG

IPC分类号： H03M1/38

CPC分类号： H03M1/462 ,  H03M1/466

摘要： A method for a successive approximation register ADC which includes at least one capacitor array and a plurality of switches is provided, in which the capacitors of the capacitor array are one-to-one corresponding to the switches. The method includes the following steps: firstly, at least one multiplexer is configured. Then, a first comparison voltage is outputted based on the terminal voltages on the terminals of the capacitor array, and a comparison result is outputted according to the first comparison voltage and a second comparison voltage. Afterwards, a sequence of comparisons is controlled based on the comparison result to enter into a sequence of comparison phases. Finally, the switches are orderly selected, by the multiplexer based on the comparison phases, to switch directly according to the comparison result.

摘要翻译： 提供一种包括至少一个电容器阵列和多个开关的逐次逼近寄存器ADC的方法，其中电容器阵列的电容器对应于开关一一对应。 该方法包括以下步骤：首先配置至少一个多路复用器。 然后，基于电容器阵列的端子上的端子电压输出第一比较电压，并且根据第一比较电压和第二比较电压输出比较结果。 之后，根据比较结果控制比较序列，进入比较阶段。 最后，通过多路复用器根据比较阶段有序地选择开关，根据比较结果直接切换。

公开(公告)号：US20120274489A1

公开(公告)日：2012-11-01

申请号：US13096908

申请日：2011-04-28

申请人： Soon-Jyh CHANG ,  Guan-Ying Huang ,  Chun-Cheng LIU ,  CHUNG-MING HUANG ,  Jin-Fu LIN ,  Chih-Haur HUANG

发明人： Soon-Jyh CHANG ,  Guan-Ying Huang ,  Chun-Cheng LIU ,  CHUNG-MING HUANG ,  Jin-Fu LIN ,  Chih-Haur HUANG

IPC分类号： H03M1/00

CPC分类号： H03M1/462 ,  H03M1/466

摘要： A successive approximation register (SAR) analog-to-digital converter (ADC) is disclosed. A first and second capacitor DACs receive a first and second input signals respectively. A first coarse comparator compares an output of the first capacitor DAC with a window reference voltage, a second coarse comparator compares an output of the second capacitor DAC with the window reference voltage, and a fine comparator compares the output of the first capacitor DAC with the output of the second capacitor DAC. A SAR controller receives outputs of the first and second coarse comparators to determine whether the outputs of the first and second capacitor DACs are within a predictive window determined by the window reference voltage. The SAR controller bypasses at least one phase of analog-to-digital conversion of the SAR ADC when the outputs of the first capacitor DAC and the second capacitor DAC are determined to be within the predictive window. The SAR controller decodes the outputs of the first and second coarse comparators and the fine comparator to obtain a converted output of the SAR ADC.

摘要翻译： 公开了逐次逼近寄存器（SAR）模拟 - 数字转换器（ADC）。 第一和第二电容器DAC分别接收第一和第二输入信号。 第一粗略比较器将第一电容器DAC的输出与窗口参考电压进行比较，第二粗略比较器将第二电容器DAC的输出与窗口参考电压进行比较，并且精细比较器将第一电容器DAC的输出与 第二电容DAC的输出。 SAR控制器接收第一和第二粗略比较器的输出，以确定第一和第二电容器DAC的输出是否在由窗口参考电压确定的预测窗口内。 当第一电容器DAC和第二电容器DAC的输出被确定为在预测窗口内时，SAR控制器绕过SAR ADC的至少一个模数转换阶段。 SAR控制器解码第一和第二粗略比较器和精细比较器的输出，以获得SAR ADC的转换输出。

公开(公告)号：US08477058B2

公开(公告)日：2013-07-02

申请号：US13272110

申请日：2011-10-12

申请人： Soon-Jyh Chang ,  Guan-Ying Huang ,  Chung-Ming Huang

发明人： Soon-Jyh Chang ,  Guan-Ying Huang ,  Chung-Ming Huang

IPC分类号： H03M1/34

CPC分类号： H03M1/462 ,  H03M1/466

摘要： A method for a successive approximation register ADC which includes at least one capacitor array and a plurality of switches is provided, in which the capacitors of the capacitor array are one-to-one corresponding to the switches. The method includes the following steps: firstly, at least one multiplexer is configured. Then, a first comparison voltage is outputted based on the terminal voltages on the terminals of the capacitor array, and a comparison result is outputted according to the first comparison voltage and a second comparison voltage. Afterwards, a sequence of comparisons is controlled based on the comparison result to enter into a sequence of comparison phases. Finally, the switches are orderly selected, by the multiplexer based on the comparison phases, to switch directly according to the comparison result.

摘要翻译： 提供一种包括至少一个电容器阵列和多个开关的逐次逼近寄存器ADC的方法，其中电容器阵列的电容器对应于开关一一对应。 该方法包括以下步骤：首先配置至少一个多路复用器。 然后，基于电容器阵列的端子上的端子电压输出第一比较电压，并且根据第一比较电压和第二比较电压输出比较结果。 之后，根据比较结果控制比较序列，进入比较阶段。 最后，通过多路复用器根据比较阶段有序地选择开关，根据比较结果直接切换。

公开(公告)号：US20120154194A1

公开(公告)日：2012-06-21

申请号：US13052462

申请日：2011-03-21

申请人： Soon-Jyh Chang ,  Chun-Cheng Liu ,  Guan-Ying Huang

发明人： Soon-Jyh Chang ,  Chun-Cheng Liu ,  Guan-Ying Huang

IPC分类号： H03M1/34

CPC分类号： H03M1/002 ,  H03M1/0682 ,  H03M1/466

摘要： The configurations and adjusting method of a successive approximation analog-to-digital converter (SAR ADC) are provided. The provided SAR ADC includes at least one capacitor with a first and a second terminals, and a plurality of bits, each of which is connected to the at least one capacitor, wherein the first terminal receives an input signal, and the second terminal selectively receives one of a first and a second reference voltages, and a first comparator receiving an adjustable third reference voltage and a first voltage value generated by the input signal, wherein a connection of the second terminal of each the capacitor of the capacitor array is switched when the first voltage value is larger than the third reference voltage.

摘要翻译： 提供了逐次逼近模数转换器（SAR ADC）的配置和调整方法。 所提供的SAR ADC包括具有第一和第二端子的至少一个电容器和多个位，每个电容器连接到至少一个电容器，其中第一端子接收输入信号，并且第二端子选择性地接收 第一参考电压和第二参考电压之一，以及接收可调节的第三参考电压和由输入信号产生的第一电压值的第一比较器，其中当电容器阵列的每个电容器的第二端子的连接被切换时 第一电压值大于第三参考电压。

公开(公告)号：US08416116B2

公开(公告)日：2013-04-09

申请号：US13052462

申请日：2011-03-21

申请人： Soon-Jyh Chang ,  Chun-Cheng Liu ,  Guan-Ying Huang

发明人： Soon-Jyh Chang ,  Chun-Cheng Liu ,  Guan-Ying Huang

IPC分类号： H03M1/12

CPC分类号： H03M1/002 ,  H03M1/0682 ,  H03M1/466

摘要： The configurations and adjusting method of a successive approximation analog-to-digital converter (SAR ADC) are provided. The provided SAR ADC includes at least one capacitor with a first and a second terminals, and a plurality of bits, each of which is connected to the at least one capacitor, wherein the first terminal receives an input signal, and the second terminal selectively receives one of a first and a second reference voltages, and a first comparator receiving an adjustable third reference voltage and a first voltage value generated by the input signal, wherein a connection of the second terminal of each the capacitor of the capacitor array is switched when the first voltage value is larger than the third reference voltage.

摘要翻译： 提供了逐次逼近模数转换器（SAR ADC）的配置和调整方法。 所提供的SAR ADC包括具有第一和第二端子的至少一个电容器和多个位，每个电容器连接到至少一个电容器，其中第一端子接收输入信号，并且第二端子选择性地接收 第一参考电压和第二参考电压之一，以及接收可调节的第三参考电压和由输入信号产生的第一电压值的第一比较器，其中当电容器阵列的每个电容器的第二端子的连接被切换时 第一电压值大于第三参考电压。

公开(公告)号：US20140049872A1

公开(公告)日：2014-02-20

申请号：US13587319

申请日：2012-08-16

申请人： Guan-Ying Huang ,  Jin-Fu Lin

发明人： Guan-Ying Huang ,  Jin-Fu Lin

IPC分类号： H01G4/30

CPC分类号： H01G4/30 ,  H01G4/232 ,  H01G4/33 ,  H01L23/5223 ,  H01L23/5225 ,  H01L28/60 ,  H01L28/90 ,  H01L2924/0002 ,  H01L2924/00

摘要： A metal-oxide-metal (MOM) capacitor able to reduce area of capacitor arrays is revealed. The MOM capacitor mainly includes at least three parallel conducting layers. Each parallel conducting layer consists of a first conductive plate, a second conductive plate disposed around the first conductive plate. There is a preset distance between the first conductive plate and the second conductive plate. The first conductive plates are electrically connected by at least one first via while the second conductive plates are electrically connected by at least one second via. Thereby, while being applied to capacitor arrays, the second conductive plates of the two adjacent MOM capacitors are connected together and shared with each other, so as to significantly reduce area of the capacitor array, improve circuit density and further optimize the layout efficiency of the chip design.

摘要翻译： 揭示了能够减小电容器阵列面积的金属氧化物金属（MOM）电容器。 MOM电容器主要包括至少三个平行导电层。 每个平行导电层由第一导电板，围绕第一导电板设置的第二导电板组成。 在第一导电板和第二导电板之间存在预设的距离。 第一导电板通过至少一个第一通孔电连接，而第二导电板通过至少一个第二通孔电连接。 因此，在将电容器阵列施加到电容器阵列的同时，两个相邻的MOM电容器的第二导电板彼此连接并共享，从而显着地减小电容器阵列的面积，从而提高电路密度并进一步优化布线效率 芯片设计。