公开(公告)号：US08765559B2

公开(公告)日：2014-07-01

申请号：US13358101

申请日：2012-01-25

申请人： Stephan Kronholz ,  Gunda Beernink ,  Markus Lenski ,  Frank Seliger ,  Frank Richter

发明人： Stephan Kronholz ,  Gunda Beernink ,  Markus Lenski ,  Frank Seliger ,  Frank Richter

IPC分类号： H01L21/336

CPC分类号： H01L21/823807 ,  H01L21/823814

摘要： When forming sophisticated gate electrode structures, such as high-k metal gate electrode structures, an appropriate encapsulation may be achieved, while also undue material loss of a strain-inducing semiconductor material that is provided in one type of transistor may be avoided. To this end, the patterning of the protective spacer structure prior to depositing the strain-inducing semiconductor material may be achieved for each type of transistor on the basis of the same process flow, while, after the deposition of the strain-inducing semiconductor material, an etch stop layer may be provided so as to preserve integrity of the active regions.

摘要翻译： 当形成诸如高k金属栅电极结构的复杂的栅电极结构时，可以实现适当的封装，同时也可以避免在一种晶体管中提供的应变诱导半导体材料的不适当的材料损耗。 为此，可以在沉积应变诱导半导体材料之前对保护间隔物结构进行图案化，其基于相同的工艺流程，对于每种类型的晶体管，在应变诱导半导体材料沉积之后， 可以提供蚀刻停止层，以便保持活性区域的完整性。

公开(公告)号：US20120196417A1

公开(公告)日：2012-08-02

申请号：US13358101

申请日：2012-01-25

申请人： Stephan Kronholz ,  Gunda Beernink ,  Markus Lenski ,  Frank Seliger ,  Frank Richter

发明人： Stephan Kronholz ,  Gunda Beernink ,  Markus Lenski ,  Frank Seliger ,  Frank Richter

IPC分类号： H01L21/8234

CPC分类号： H01L21/823807 ,  H01L21/823814

摘要： When forming sophisticated gate electrode structures, such as high-k metal gate electrode structures, an appropriate encapsulation may be achieved, while also undue material loss of a strain-inducing semiconductor material that is provided in one type of transistor may be avoided. To this end, the patterning of the protective spacer structure prior to depositing the strain-inducing semiconductor material may be achieved for each type of transistor on the basis of the same process flow, while, after the deposition of the strain-inducing semiconductor material, an etch stop layer may be provided so as to preserve integrity of the active regions.

摘要翻译： 当形成诸如高k金属栅电极结构的复杂的栅电极结构时，可以实现适当的封装，同时也可以避免在一种晶体管中提供的应变诱导半导体材料的不适当的材料损耗。 为此，可以在沉积应变诱导半导体材料之前对保护间隔物结构进行图案化，其基于相同的工艺流程，对于每种类型的晶体管，在应变诱导半导体材料沉积之后， 可以提供蚀刻停止层，以便保持活性区域的完整性。

公开(公告)号：US07981740B2

公开(公告)日：2011-07-19

申请号：US12821583

申请日：2010-06-23

申请人： Markus Lenski ,  Kerstin Ruttloff ,  Martin Mazur ,  Frank Seliger ,  Ralf Otterbach

发明人： Markus Lenski ,  Kerstin Ruttloff ,  Martin Mazur ,  Frank Seliger ,  Ralf Otterbach

IPC分类号： H01L21/8238 ,  H01L21/336

CPC分类号： H01L21/823864 ,  H01L21/823807 ,  H01L29/7843

摘要： When forming transistor elements on the basis of sophisticated high-k metal gate structures, the efficiency of a replacement gate approach may be enhanced by more efficiently adjusting the gate height of transistors of different conductivity type when the dielectric cap layers of transistors may have experienced a different process history and may thus require a subsequent adaptation of the final cap layer thickness in one type of the transistors. For this purpose, a hard mask material may be used during a process sequence for forming offset spacer elements in one gate electrode structure while covering another gate electrode structure.

摘要翻译： 当在复杂的高k金属栅极结构的基础上形成晶体管元件时，可以通过更有效地调节不同导电类型的晶体管的栅极高度来增强置换栅极方法的效率，当晶体管的介质盖层可能经历了 因此可能需要在一种类型的晶体管中随后适应最终的盖层厚度。 为此，可以在用于在一个栅电极结构中形成偏移间隔元件同时覆盖另一栅电极结构的处理顺序期间使用硬掩模材料。

公开(公告)号：US08987103B2

公开(公告)日：2015-03-24

申请号：US12776674

申请日：2010-05-10

申请人： Markus Lenski ,  Kerstin Ruttloff ,  Volker Jaschke ,  Frank Seliger ,  Ralf Otterbach

发明人： Markus Lenski ,  Kerstin Ruttloff ,  Volker Jaschke ,  Frank Seliger ,  Ralf Otterbach

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/768

CPC分类号： H01L21/823468 ,  H01L21/76837 ,  H01L21/76895 ,  H01L21/823425

摘要： In advanced semiconductor devices, spacer elements may be formed on the basis of a multi-station deposition technique, wherein a certain degree of variability of the various sub-layers of the spacer materials, such as a different thickness, may be applied in order to enhance etch conditions during the subsequent anisotropic etch process. Consequently, spacer elements of improved shape may result in superior deposition conditions when using a stress-inducing dielectric material. Consequently, yield losses due to contact failures in densely packed device areas, such as static RAM areas, may be reduced.

摘要翻译： 在先进的半导体器件中，可以基于多工段沉积技术形成间隔元件，其中可以应用间隔材料的各个子层的一定程度的变化性，例如不同的厚度，以便 在随后的各向异性蚀刻工艺期间增强蚀刻条件。 因此，当使用应力诱导介电材料时，改进形状的间隔元件可能导致优异的沉积条件。 因此，由于紧密封装的设备区域（例如静态RAM区域）中的接触故障导致的屈服损失可能会降低。

公开(公告)号：US20110129980A1

公开(公告)日：2011-06-02

申请号：US12905655

申请日：2010-10-15

申请人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

发明人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

IPC分类号： H01L21/336

CPC分类号： H01L21/823828 ,  H01L21/823807 ,  H01L29/7843

摘要： Dielectric cap layers of sophisticated high-k metal gate electrode structures may be efficiently removed on the basis of a sacrificial fill material, thereby reliably preserving integrity of a protective sidewall spacer structure, which in turn may result in superior uniformity of the threshold voltage of the transistors. The sacrificial fill material may be provided in the form of an organic material that may be reduced in thickness on the basis of a wet developing process, thereby enabling a high degree of process controllability.

摘要翻译： 可以基于牺牲填充材料有效地去除复杂的高k金属栅极电极结构的介电盖层，从而可靠地保持保护性侧壁间隔结构的完整性，这又可以导致优异的阈值电压均匀性 晶体管。 牺牲填充材料可以以有机材料的形式提供，其可以基于湿式显影工艺而减小厚度，从而能够实现高度的工艺可控性。

公开(公告)号：US08329526B2

公开(公告)日：2012-12-11

申请号：US12905655

申请日：2010-10-15

申请人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

发明人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8238

CPC分类号： H01L21/823828 ,  H01L21/823807 ,  H01L29/7843

摘要： Dielectric cap layers of sophisticated high-k metal gate electrode structures may be efficiently removed on the basis of a sacrificial fill material, thereby reliably preserving integrity of a protective sidewall spacer structure, which in turn may result in superior uniformity of the threshold voltage of the transistors. The sacrificial fill material may be provided in the form of an organic material that may be reduced in thickness on the basis of a wet developing process, thereby enabling a high degree of process controllability.

摘要翻译： 可以基于牺牲填充材料有效地去除复杂的高k金属栅极电极结构的介电盖层，从而可靠地保持保护性侧壁间隔结构的完整性，这又可以导致优异的阈值电压均匀性 晶体管。 牺牲填充材料可以以有机材料的形式提供，其可以基于湿式显影工艺而减小厚度，从而能够实现高度的工艺可控性。

公开(公告)号：US20100330757A1

公开(公告)日：2010-12-30

申请号：US12821583

申请日：2010-06-23

申请人： Markus Lenski ,  Kerstin Ruttloff ,  Martin Mazur ,  Frank Seliger ,  Ralf Otterbach

发明人： Markus Lenski ,  Kerstin Ruttloff ,  Martin Mazur ,  Frank Seliger ,  Ralf Otterbach

IPC分类号： H01L21/8238 ,  H01L21/8234

CPC分类号： H01L21/823864 ,  H01L21/823807 ,  H01L29/7843

摘要： When forming transistor elements on the basis of sophisticated high-k metal gate structures, the efficiency of a replacement gate approach may be enhanced by more efficiently adjusting the gate height of transistors of different conductivity type when the dielectric cap layers of transistors may have experienced a different process history and may thus require a subsequent adaptation of the final cap layer thickness in one type of the transistors. For this purpose, a hard mask material may be used during a process sequence for forming offset spacer elements in one gate electrode structure while covering another gate electrode structure.

摘要翻译： 当在复杂的高k金属栅极结构的基础上形成晶体管元件时，可以通过更有效地调节不同导电类型的晶体管的栅极高度来增强置换栅极方法的效率，当晶体管的介质盖层可能经历了 因此可能需要在一种类型的晶体管中随后适应最终的盖层厚度。 为此，可以在用于在一个栅电极结构中形成偏移间隔元件同时覆盖另一栅电极结构的处理顺序期间使用硬掩模材料。

公开(公告)号：US20100289083A1

公开(公告)日：2010-11-18

申请号：US12776674

申请日：2010-05-10

申请人： Markus Lenski ,  Kerstin Ruttloff ,  Volker Jaschke ,  Frank Seliger

发明人： Markus Lenski ,  Kerstin Ruttloff ,  Volker Jaschke ,  Frank Seliger

IPC分类号： H01L27/088 ,  H01L21/336

CPC分类号： H01L21/823468 ,  H01L21/76837 ,  H01L21/76895 ,  H01L21/823425

摘要： In advanced semiconductor devices, spacer elements may be formed on the basis of a multi-station deposition technique, wherein a certain degree of variability of the various sub-layers of the spacer materials, such as a different thickness, may be applied in order to enhance etch conditions during the subsequent anisotropic etch process. Consequently, spacer elements of improved shape may result in superior deposition conditions when using a stress-inducing dielectric material. Consequently, yield losses due to contact failures in densely packed device areas, such as static RAM areas, may be reduced.

摘要翻译： 在先进的半导体器件中，可以基于多工段沉积技术形成间隔元件，其中可以应用间隔材料的各个子层的一定程度的变化性，例如不同的厚度，以便 在随后的各向异性蚀刻工艺期间增强蚀刻条件。 因此，当使用应力诱导介电材料时，改进形状的间隔元件可能导致优异的沉积条件。 因此，由于紧密封装的设备区域（例如静态RAM区域）中的接触故障导致的屈服损失可能会降低。

公开(公告)号：US20110104880A1

公开(公告)日：2011-05-05

申请号：US12894985

申请日：2010-09-30

申请人： Jens Heinrich ,  Thomas Werner ,  Frank Seliger ,  Frank Richter

发明人： Jens Heinrich ,  Thomas Werner ,  Frank Seliger ,  Frank Richter

IPC分类号： H01L21/71

CPC分类号： H01L21/82385 ,  H01L21/28088 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66583 ,  H01L29/7833

摘要： In a replacement gate approach, a top area of a gate opening has a superior cross-sectional shape which is accomplished on the basis of a plasma assisted etch process or an ion sputter process. During the process, a sacrificial fill material protects sensitive materials, such as a high-k dielectric material and a corresponding cap material. Consequently, the subsequent deposition of a work function adjusting material layer may not result in a surface topography which may result in a non-reliable filling-in of the electrode metal. In some illustrative embodiments, the sacrificial fill material may also be used as a deposition mask for avoiding the deposition of the work function adjusting metal in certain gate openings in which a different type of work function adjusting species is required.

摘要翻译： 在替代栅极方法中，栅极开口的顶部区域具有优异的横截面形状，其基于等离子体辅助蚀刻工艺或离子溅射工艺来实现。 在该过程中，牺牲填充材料保护敏感材料，例如高k电介质材料和对应的帽材料。 因此，随后的功函调整材料层的沉积可能不会导致表面形貌，这可能导致不可靠地填充电极金属。 在一些说明性实施例中，牺牲填充材料也可以用作沉积掩模，以避免功能调节金属沉积在需要不同类型的功能调节物质的某些门开口中。

公开(公告)号：US07951677B2

公开(公告)日：2011-05-31

申请号：US12894985

申请日：2010-09-30

申请人： Jens Heinrich ,  Thomas Werner ,  Frank Seliger ,  Frank Richter

发明人： Jens Heinrich ,  Thomas Werner ,  Frank Seliger ,  Frank Richter

IPC分类号： H01L21/336

CPC分类号： H01L21/82385 ,  H01L21/28088 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66583 ,  H01L29/7833

摘要： In a replacement gate approach, a top area of a gate opening has a superior cross-sectional shape which is accomplished on the basis of a plasma assisted etch process or an ion sputter process. During the process, a sacrificial fill material protects sensitive materials, such as a high-k dielectric material and a corresponding cap material. Consequently, the subsequent deposition of a work function adjusting material layer may not result in a surface topography which may result in a non-reliable filling-in of the electrode metal. In some illustrative embodiments, the sacrificial fill material may also be used as a deposition mask for avoiding the deposition of the work function adjusting metal in certain gate openings in which a different type of work function adjusting species is required.

摘要翻译： 在替代栅极方法中，栅极开口的顶部区域具有优异的横截面形状，其基于等离子体辅助蚀刻工艺或离子溅射工艺来实现。 在该过程中，牺牲填充材料保护敏感材料，例如高k电介质材料和对应的帽材料。 因此，随后的功函调整材料层的沉积可能不会导致表面形貌，这可能导致不可靠地填充电极金属。 在一些说明性实施例中，牺牲填充材料也可以用作沉积掩模，以避免功能调节金属沉积在需要不同类型的功能调节物质的某些门开口中。