公开(公告)号：US20060007757A1

公开(公告)日：2006-01-12

申请号：US10886428

申请日：2004-07-07

申请人： Sugato Mukherjee ,  Wen Li ,  Christopher Morzano

发明人： Sugato Mukherjee ,  Wen Li ,  Christopher Morzano

IPC分类号： G11C7/00

CPC分类号： G11C7/1087 ,  G11C7/1078 ,  G11C7/1093 ,  G11C7/22 ,  G11C7/222

摘要： The disclosed system and method significantly reduce or eliminate DQS postamble ringing problem in modern high-speed memory chips, allowing the memory chips to be operated at significantly faster clock speeds. The external strobe signal (XDQS) may be used to generate at least two derivative strobe signals therefrom. Instead of the XDQS signal, the derivative strobe signals are then used, in a predetermined order, to clock in or strobe the data to be written into memory cells. The last generated derivative strobe signal may be used to finally transfer the data bits into memory cells. Once the last of the derivative strobe signals is activated, and so long as there are no more data writes pending in the command pipe for the next clock cycle, the rising or falling edge of the last derivative strobe signal can be detected to turn off further generation of the strobe signals prior to any onset of postamble ringing on the XDQS signal. Thus, false data may not get “clocked in” or written into the memory chip because of postamble ringing. This prevents data corruption and preserves the integrity of the data written into a memory chip.

公开(公告)号：US07102937B2

公开(公告)日：2006-09-05

申请号：US10886428

申请日：2004-07-07

申请人： Sugato Mukherjee ,  Wen Li ,  Christopher K. Morzano

发明人： Sugato Mukherjee ,  Wen Li ,  Christopher K. Morzano

IPC分类号： G11C7/00

CPC分类号： G11C7/1087 ,  G11C7/1078 ,  G11C7/1093 ,  G11C7/22 ,  G11C7/222

摘要： The disclosed system and method significantly reduce or eliminate DQS postamble ringing problem in modern high-speed memory chips, allowing the memory chips to be operated at significantly faster clock speeds. The external strobe signal (XDQS) may be used to generate at least two derivative strobe signals therefrom. Instead of the XDQS signal, the derivative strobe signals are then used, in a predetermined order, to clock in or strobe the data to be written into memory cells. The last generated derivative strobe signal may be used to finally transfer the data bits into memory cells. Once the last of the derivative strobe signals is activated, and so long as there are no more data writes pending in the command pipe for the next clock cycle, the rising or falling edge of the last derivative strobe signal can be detected to turn off further generation of the strobe signals prior to any onset of postamble ringing on the XDQS signal. Thus, false data may not get “clocked in” or written into the memory chip because of postamble ringing. This prevents data corruption and preserves the integrity of the data written into a memory chip.

摘要翻译： 所公开的系统和方法显着减少或消除了现代高速存储器芯片中的DQS后置码振铃问题，从而允许以显着更快的时钟速度操作存储器芯片。 外部选通信号（XDQS）可用于从其产生至少两个导数选通信号。 代替XDQS信号，然后以预定顺序使用导数选通信号来对要写入存储单元的数据进行时钟输入或选通。 最后生成的导数选通信号可以用于最终将数据位传送到存储单元。 一旦导数选通信号的最后一个被激活，并且只要在下一个时钟周期的命令管道中没有更多数据写入挂起，则可以检测最后导数选通信号的上升沿或下降沿，以进一步关闭 在XDQS信号上发生后同步码振铃之前，产生选通信号。 因此，伪数据可能不会被“计时”或写入存储器芯片，因为后置码振铃。 这样可防止数据损坏并保留写入存储芯片的数据的完整性。

公开(公告)号：US20060261891A1

公开(公告)日：2006-11-23

申请号：US11494356

申请日：2006-07-26

申请人： Sugato Mukherjee ,  Yangsung Joo

发明人： Sugato Mukherjee ,  Yangsung Joo

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/4521 ,  H03F2200/513 ,  H03F2200/78 ,  H03F2203/45101 ,  H03F2203/45451 ,  H03K5/2481

摘要： A low voltage CMOS differential amplifier is provided. More specifically, in one embodiment, there is provided a method of manufacturing a device comprising coupling a fixed biased transistor in parallel to a self-biased transistor and configuring the fixed biased transistor and the self-biased transistor to provide a current to a differential amplifier, wherein the fixed biased transistor is configured to provide current to the differential amplifier when the self-biased transistor is operating in a triode or cut-off region.

摘要翻译： 提供了一个低电压CMOS差分放大器。 更具体地，在一个实施例中，提供了一种制造器件的方法，包括将固定偏置晶体管并联到自偏置晶体管并且配置固定偏置晶体管和自偏置晶体管以向差分放大器提供电流 ，其中所述固定偏置晶体管被配置为当所述自偏置晶体管在三极管或截止区域中操作时向所述差分放大器提供电流。

公开(公告)号：US07772908B2

公开(公告)日：2010-08-10

申请号：US12492942

申请日：2009-06-26

申请人： Manoj Sinha ,  Sugato Mukherjee

发明人： Manoj Sinha ,  Sugato Mukherjee

IPC分类号： H03H11/26

CPC分类号： G11C7/04 ,  G11C7/222 ,  G11C11/406 ,  G11C11/40626 ,  G11C11/4076 ,  H03K5/06 ,  H03K5/133 ,  H03K2005/00039 ,  H03K2005/0013 ,  H03K2005/00143

摘要： A delay circuit provides a voltage and temperature compensated delayed output signal. The delay circuit includes a first delay stage that receives an input signal, and generates a delayed output signal from the input signal. The delay circuit also includes a second delay stage that receives the delayed output signal of the first delay stage, and generates a delayed output signal from the output of the first delay stage. The first delay stage and the second delay stage are coupled a voltage supply. The magnitude of the delay of the second delayed signal is inversely proportional to the magnitude of the supply voltage to substantially the same degree that the delayed output signal of the first delay stage is proportional to the magnitude of the supply voltage.

摘要翻译： 延迟电路提供电压和温度补偿的延迟输出信号。 延迟电路包括接收输入信号并从输入信号产生延迟的输出信号的第一延迟级。 延迟电路还包括接收第一延迟级的延迟输出信号的第二延迟级，并且从第一延迟级的输出产生延迟的输出信号。 第一延迟级和第二延迟级耦合电压源。 第二延迟信号的延迟的幅度与电源电压的大小成反比，该电平大致与第一延迟级的延迟输出信号与电源电压的大小成正比。

公开(公告)号：US07557631B2

公开(公告)日：2009-07-07

申请号：US11594690

申请日：2006-11-07

申请人： Manoj Sinha ,  Sugato Mukherjee

发明人： Manoj Sinha ,  Sugato Mukherjee

IPC分类号： H03H11/26

CPC分类号： G11C7/04 ,  G11C7/222 ,  G11C11/406 ,  G11C11/40626 ,  G11C11/4076 ,  H03K5/06 ,  H03K5/133 ,  H03K2005/00039 ,  H03K2005/0013 ,  H03K2005/00143

摘要： A delay circuit provides a voltage and temperature compensated delayed output signal. The delay circuit includes a first delay stage that receives an input signal, and generates a delayed output signal from the input signal. The delay circuit also includes a second delay stage that receives the delayed output signal of the first delay stage, and generates a delayed output signal from the output of the first delay stage. The first delay stage and the second delay stage are coupled a voltage supply. The magnitude of the delay of the second delayed signal is inversely proportional to the magnitude of the supply voltage to substantially the same degree that the delayed output signal of the first delay stage is proportional to the magnitude of the supply voltage.

摘要翻译： 延迟电路提供电压和温度补偿的延迟输出信号。 延迟电路包括接收输入信号并从输入信号产生延迟的输出信号的第一延迟级。 延迟电路还包括接收第一延迟级的延迟输出信号的第二延迟级，并且从第一延迟级的输出产生延迟的输出信号。 第一延迟级和第二延迟级耦合电压源。 第二延迟信号的延迟的幅度与电源电压的大小成反比，该电平大致与第一延迟级的延迟输出信号与电源电压的大小成正比。

公开(公告)号：US20090028212A1

公开(公告)日：2009-01-29

申请号：US12220577

申请日：2008-07-25

申请人： Sugato Mukherjee

发明人： Sugato Mukherjee

IPC分类号： G01K7/00

CPC分类号： G01K1/026 ,  G01K7/015 ,  G01K2219/00

摘要： A converter comprising a comparator having a first input operable to receive a first signal, a second input operable to receive a second signal, and an output, a switch for sinking a portion of the first signal, wherein the switch is responsive to the output, and an integrator connected to the first input, wherein the first signal is a voltage developed by the integrator when a current proportional to the absolute temperature is applied thereto. A method for measuring temperature of a device using a comparator and converting the bitstream of the comparator to a digital output is also given. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

摘要翻译： A转换器，包括具有可操作以接收第一信号的第一输入的比较器，可操作以接收第二信号的第二输入和输出，用于吸收所述第一信号的一部分的开关，其中所述开关响应于所述输出， 以及连接到第一输入的积分器，其中当与绝对温度成比例的电流施加到其上时，第一信号是积分器产生的电压。 还给出了使用比较器来测量装置的温度并将比较器的比特流转换为数字输出的方法。 由于管理摘要的规则，本摘要不应用于解释索赔。

公开(公告)号：US07271654B2

公开(公告)日：2007-09-18

申请号：US11494356

申请日：2006-07-26

申请人： Sugato Mukherjee ,  Yangsung Joo

发明人： Sugato Mukherjee ,  Yangsung Joo

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/4521 ,  H03F2200/513 ,  H03F2200/78 ,  H03F2203/45101 ,  H03F2203/45451 ,  H03K5/2481

摘要： A low voltage CMOS differential amplifier is provided. More specifically, in one embodiment, there is provided a method of manufacturing a device comprising coupling a fixed biased transistor in parallel to a self-biased transistor and configuring the fixed biased transistor and the self-biased transistor to provide a current to a differential amplifier, wherein the fixed biased transistor is configured to provide current to the differential amplifier when the self-biased transistor is operating in a triode or cut-off region.

摘要翻译： 提供了一个低电压CMOS差分放大器。 更具体地，在一个实施例中，提供了一种制造器件的方法，包括将固定偏置晶体管并联到自偏置晶体管并且配置固定偏置晶体管和自偏置晶体管以向差分放大器提供电流 ，其中所述固定偏置晶体管被配置为当所述自偏置晶体管在三极管或截止区域中操作时向所述差分放大器提供电流。

公开(公告)号：US20100277222A1

公开(公告)日：2010-11-04

申请号：US12838211

申请日：2010-07-16

申请人： Sugato Mukherjee

发明人： Sugato Mukherjee

IPC分类号： H01L37/00

CPC分类号： G01K1/026 ,  G01K7/015 ,  G01K2219/00

摘要： A converter comprising a comparator having a first input operable to receive a first signal, a second input operable to receive a second signal, and an output, a switch for sinking a portion of the first signal, wherein the switch is responsive to the output, and an integrator connected to the first input, wherein the first signal is a voltage developed by the integrator when a current proportional to the absolute temperature is applied thereto. A method for measuring temperature of a device using a comparator and converting the bitstream of the comparator to a digital output is also given. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

摘要翻译： A转换器，包括具有可操作以接收第一信号的第一输入的比较器，可操作以接收第二信号的第二输入和输出，用于吸收所述第一信号的一部分的开关，其中所述开关响应于所述输出， 以及连接到第一输入的积分器，其中当与绝对温度成比例的电流施加到其上时，第一信号是由积分器产生的电压。 还给出了使用比较器来测量装置的温度并将比较器的比特流转换为数字输出的方法。 由于管理摘要的规则，本摘要不应用于解释索赔。

公开(公告)号：US07446610B2

公开(公告)日：2008-11-04

申请号：US11900273

申请日：2007-09-11

申请人： Sugato Mukherjee ,  Yangsung Joo

发明人： Sugato Mukherjee ,  Yangsung Joo

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/4521 ,  H03F2200/513 ,  H03F2200/78 ,  H03F2203/45101 ,  H03F2203/45451 ,  H03K5/2481

摘要： A low voltage CMOS differential amplifier is provided. More specifically, in one embodiment, a device comprising a differential pair is provided. A self-biased transistor and a component are coupled to the differential pair. At least one of the self-biased transistor and the component supply a current to the differential pair, wherein the component supplies substantially all of the current when the self-biased transistor is operating in a triode state.

公开(公告)号：US20080001663A1

公开(公告)日：2008-01-03

申请号：US11900273

申请日：2007-09-11

申请人： Sugato Mukherjee ,  Yangsung Joo

发明人： Sugato Mukherjee ,  Yangsung Joo

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/4521 ,  H03F2200/513 ,  H03F2200/78 ,  H03F2203/45101 ,  H03F2203/45451 ,  H03K5/2481

摘要： A low voltage CMOS differential amplifier is provided. More specifically, in one embodiment, a device comprising a differential pair is provided. A self-biased transistor and a component are coupled to the differential pair. At least one of the self-biased transistor and the component supply a current to the differential pair, wherein the component supplies substantially all of the current when the self-biased transistor is operating in a triode state.

摘要翻译： 提供了一个低电压CMOS差分放大器。 更具体地，在一个实施例中，提供了包括差分对的装置。 自偏置晶体管和元件耦合到差分对。 自偏置晶体管和元件中的至少一个向差分对提供电流，其中当自偏置晶体管工作在三极管状态时，该元件基本上提供所有电流。