Semiconductor device
    1.
    发明授权

    公开(公告)号:US11557553B2

    公开(公告)日:2023-01-17

    申请号:US16942177

    申请日:2020-07-29

    摘要: Disclosed is a semiconductor device including a semiconductor die, a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess on its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.

    MATCHING CIRCUIT BOARD AND SEMICONDUCTOR DEVICE

    公开(公告)号:US20240292520A1

    公开(公告)日:2024-08-29

    申请号:US18437713

    申请日:2024-02-09

    发明人: Ikuo Nakashima

    IPC分类号: H05K1/02 H01L23/498 H05K1/16

    摘要: A matching circuit board includes a first substrate, a second substrate, and a third substrate. The first substrate includes a first insulator, a first metal pattern, and first conductive vias. The second substrate includes a second insulator, a second metal pattern, and second conductive vias. The third substrate includes a third insulator and a third metal pattern. A capacitor is constituted by the first metal pattern, the second insulator, and the second metal pattern, and a capacitor is constituted by the first metal pattern, the first insulator, and the third metal pattern. The second metal pattern is electrically connected to the third metal pattern through the second conductive vias and the first conductive vias. The first metal pattern is separated from the first conductive vias to be positioned inside the first conductive vias, and is insulated from the first conductive vias.