公开(公告)号：US20130001567A1

公开(公告)日：2013-01-03

申请号：US13604082

申请日：2012-09-05

申请人： Sung-Ryul KIM ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  O-Sung Seo ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Jong-In Kim ,  Jae-Jin Song

发明人： Sung-Ryul KIM ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  O-Sung Seo ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Jong-In Kim ,  Jae-Jin Song

IPC分类号： H01L33/08

CPC分类号： H01L29/78603 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458 ,  H01L29/66765

摘要： A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.

摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板包括基板，形成在基板上的栅极线，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上的半导体层，以及数据 其中所述数据线包括下数据层，上数据层，数据氧化层和缓冲层，其中所述上数据层和所述缓冲层包括相同的材料。

公开(公告)号：US20100006835A1

公开(公告)日：2010-01-14

申请号：US12486328

申请日：2009-06-17

申请人： Kap-Soo YOON ,  Sung-Hoon YANG ,  Sung-Ryul KIM ,  O-Sung SEO ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Seong-Hun KIM ,  Yong-Mo CHOI

发明人： Kap-Soo YOON ,  Sung-Hoon YANG ,  Sung-Ryul KIM ,  O-Sung SEO ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Seong-Hun KIM ,  Yong-Mo CHOI

IPC分类号： H01L29/786

CPC分类号： H01L27/12 ,  H01L27/1225 ,  H01L29/7869

摘要： A display substrate includes; a substrate, a gate electrode arranged on the substrate, a semiconductor pattern arranged on the gate electrode, a source electrode arranged on the semiconductor pattern, a drain electrode arranged on the semiconductor pattern and spaced apart from the source electrode, an insulating layer arranged on, and substantially covering, the source electrode and the drain electrode to cover the source electrode and the drain electrode, a conductive layer pattern arranged on the insulating layer and overlapped aligned with the semiconductor pattern, a pixel electrode electrically connected to the drain electrode, and a storage electrode arranged on the substrate and overlapped overlapping with the pixel electrode, the storage electrode being electrically connected to the conductive layer pattern.

摘要翻译： 显示基板包括： 衬底，布置在衬底上的栅电极，布置在栅电极上的半导体图案，布置在半导体图案上的源电极，布置在半导体图案上并与源电极间隔开的漏电极，布置在 并且基本上覆盖源电极和漏极以覆盖源电极和漏电极，布置在绝缘层上并与半导体图案重叠的导电层图案，与漏电极电连接的像素电极，以及 存储电极，设置在所述基板上，与所述像素电极重叠地重叠，所述存储电极与所述导电层图案电连接。

公开(公告)号：US20120188204A1

公开(公告)日：2012-07-26

申请号：US13243737

申请日：2011-09-23

申请人： Yun-Jong YEO ,  Byeong-Hoon CHO ,  Ki-Hun JEONG ,  Hong-Kee CHIN ,  Jung-Suk BANG ,  Woong-Kwon KIM ,  Sung-Ryul KIM ,  Hee-Joon KIM ,  Dae-Cheol KIM ,  Kun-Wook HAN

发明人： Yun-Jong YEO ,  Byeong-Hoon CHO ,  Ki-Hun JEONG ,  Hong-Kee CHIN ,  Jung-Suk BANG ,  Woong-Kwon KIM ,  Sung-Ryul KIM ,  Hee-Joon KIM ,  Dae-Cheol KIM ,  Kun-Wook HAN

IPC分类号： G06F3/042 ,  H01L21/336

CPC分类号： G06F3/0412 ,  G06F3/042 ,  G06F2203/04103

摘要： A touch sensing substrate includes a substrate, a first light sensing element, a second light sensing element and a first bias line. The first light sensing element includes a first gate electrode, a first active pattern overlapping with the first gate electrode, a first source electrode partially overlapping with the first active pattern and a first drain electrode partially overlapping with the first active pattern. The second light sensing element includes a second gate electrode, a second active pattern overlapping with the second gate electrode, a second source electrode partially overlapping with the second active pattern and a second drain electrode partially overlapping with the second active pattern. The first bias line is connected to the first and second gate electrodes.

摘要翻译： 触摸感测基板包括基板，第一光感测元件，第二光感测元件和第一偏置线。 第一感光元件包括第一栅电极，与第一栅电极重叠的第一有源图案，与第一有源图案部分重叠的第一源电极和与第一有源图案部分重叠的第一漏电极。 第二感光元件包括第二栅电极，与第二栅电极重叠的第二有源图案，与第二有源图案部分重叠的第二源电极和与第二有源图案部分重叠的第二漏电极。 第一偏置线连接到第一和第二栅电极。

公开(公告)号：US20100051957A1

公开(公告)日：2010-03-04

申请号：US12401959

申请日：2009-03-11

申请人： Dong-Gyu KIM ,  Sung-Haeng CHO ,  Hyung-Jun KIM ,  Sung-Ryul KIM ,  Yong-Mo CHOI

发明人： Dong-Gyu KIM ,  Sung-Haeng CHO ,  Hyung-Jun KIM ,  Sung-Ryul KIM ,  Yong-Mo CHOI

IPC分类号： H01L33/00

CPC分类号： G02F1/136213 ,  H01L27/1255

摘要： A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and fight transmittance of a liquid crystal display. Also, the capacitance may be sufficiently formed through the connecting member connected to a gate metal layer.

摘要翻译： 一种薄膜晶体管阵列面板，其中形成中间存储电极和与薄膜晶体管的漏极重叠从而形成存储电容的存储电极。 因此，可以形成足够的存储电容，而不会降低开口率并且防止液晶显示器的透射率。 此外，可以通过连接到栅极金属层的连接构件充分形成电容。

公开(公告)号：US20120037912A1

公开(公告)日：2012-02-16

申请号：US13208040

申请日：2011-08-11

申请人： Dae-Cheol KIM ,  Sung-Ryul KIM ,  Yun-Jong YEO ,  Hong-Kee CHIN ,  Ki-Hun JEONG

发明人： Dae-Cheol KIM ,  Sung-Ryul KIM ,  Yun-Jong YEO ,  Hong-Kee CHIN ,  Ki-Hun JEONG

IPC分类号： H01L27/146 ,  H01L31/20 ,  H01L31/113

CPC分类号： G02F1/1368 ,  G02F1/13338 ,  G02F2001/13312 ,  H01L31/1136 ,  H01L31/12

摘要： A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.

摘要翻译： 显示装置包括红外感测晶体管和可见感测晶体管。 可见感测晶体管包括在衬底上的半导体; 半导体上的欧姆接触; 在欧姆接触上的蚀刻停止层; 蚀刻停止层上的源电极和漏电极; 源电极和漏电极上的钝化层; 和钝化层上的栅电极。 蚀刻停止层可以由与源电极和漏电极相同的材料构成。 除了不存在蚀刻停止层之外，红外感测晶体管类似于可见感测晶体管。

公开(公告)号：US20080258143A1

公开(公告)日：2008-10-23

申请号：US12100436

申请日：2008-04-10

申请人： Sung-Ryul KIM ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Jae-Ho CHOI ,  Hwa-Yeul OH ,  Yong-Mo CHOI

发明人： Sung-Ryul KIM ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Jae-Ho CHOI ,  Hwa-Yeul OH ,  Yong-Mo CHOI

IPC分类号： H01L29/786 ,  H01L21/36

CPC分类号： H01L29/78618 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/7869

摘要： A method of manufacturing a thin film transistor (“TFT”) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first conductive pattern group, forming a semiconductor layer and an ohmic contact layer on the gate insulating layer by patterning an amorphous silicon layer and an oxide semiconductor layer, forming a second conductive pattern group including a source electrode and a drain electrode on the ohmic contact layer by patterning a data metal layer, forming a protection layer including a contact hole on the second conductive pattern group, and forming a pixel electrode on the contact hole of the protection layer. The TFT substrate including the ohmic contact layer formed of an oxide semiconductor is further provided.

摘要翻译： 制造薄膜晶体管（“TFT”）基板的方法包括在基板上形成包括栅电极的第一导电图案组，在第一导电图案组上形成栅极绝缘层，形成半导体层和欧姆接触层 通过图案化非晶硅层和氧化物半导体层，在栅极绝缘层上，通过图案化数据金属层，在欧姆接触层上形成包括源电极和漏电极的第二导电图案组，形成包括接触的保护层 并且在保护层的接触孔上形成像素电极。 还提供了包括由氧化物半导体形成的欧姆接触层的TFT基板。

公开(公告)号：US20120228505A1

公开(公告)日：2012-09-13

申请号：US13194365

申请日：2011-07-29

申请人： Kun-Wook HAN ,  Sung-Ryul KIM ,  Woong-Kwon KIM ,  Dae-Cheol KIM ,  Ki-Hun JEONG ,  Jung-Suk BANG ,  Yun-Jong YEO ,  Byeong-Hoon CHO ,  Hong-Kee CHIN ,  Sung-jin MUN

发明人： Kun-Wook HAN ,  Sung-Ryul KIM ,  Woong-Kwon KIM ,  Dae-Cheol KIM ,  Ki-Hun JEONG ,  Jung-Suk BANG ,  Yun-Jong YEO ,  Byeong-Hoon CHO ,  Hong-Kee CHIN ,  Sung-jin MUN

IPC分类号： H01L27/14

CPC分类号： H01L27/14692 ,  H01L27/14665

摘要： An optical sensor includes a visible light sensor includes a visible light sensing transistor and an infrared light sensor includes an infrared light sensing transistor, wherein the visible light sensing transistor receives a first driving voltage through a first driving voltage line, the infrared light sensing transistor receives a second driving voltage through a second driving voltage line, and the visible light sensing transistor and the infrared light sensing transistor receive a reference voltage through a reference voltage line.

摘要翻译： 光学传感器包括可见光传感器，其包括可见光感测晶体管，红外光传感器包括红外光检测晶体管，其中可见光感测晶体管通过第一驱动电压线接收第一驱动电压，红外光检测晶体管接收 通过第二驱动电压线的第二驱动电压，并且可见光感测晶体管和红外光检测晶体管通过参考电压线接收参考电压。

公开(公告)号：US20120003769A1

公开(公告)日：2012-01-05

申请号：US13233399

申请日：2011-09-15

申请人： Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

发明人： Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

IPC分类号： H01L33/08

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

摘要翻译： 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US20110183463A1

公开(公告)日：2011-07-28

申请号：US12961170

申请日：2010-12-06

申请人： Sung-Ryul KIM ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Jae-Ho CHOI ,  Hwa-Yeul OH ,  Yong-Mo CHOI

发明人： Sung-Ryul KIM ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Jae-Ho CHOI ,  Hwa-Yeul OH ,  Yong-Mo CHOI

IPC分类号： H01L21/336

CPC分类号： H01L29/78618 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/7869

摘要： A method of manufacturing a thin film transistor (“TFT”) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first conductive pattern group, forming a semiconductor layer and an ohmic contact layer on the gate insulating layer by patterning an amorphous silicon layer and an oxide semiconductor layer, forming a second conductive pattern group including a source electrode and a drain electrode on the ohmic contact layer by patterning a data metal layer, forming a protection layer including a contact hole on the second conductive pattern group, and forming a pixel electrode on the contact hole of the protection layer. The TFT substrate including the ohmic contact layer formed of an oxide semiconductor is further provided.

摘要翻译： 制造薄膜晶体管（“TFT”）基板的方法包括在基板上形成包括栅电极的第一导电图案组，在第一导电图案组上形成栅极绝缘层，形成半导体层和欧姆接触层 通过图案化非晶硅层和氧化物半导体层，在栅极绝缘层上，通过图案化数据金属层，在欧姆接触层上形成包括源电极和漏电极的第二导电图案组，形成包括接触的保护层 并且在保护层的接触孔上形成像素电极。 还提供了包括由氧化物半导体形成的欧姆接触层的TFT基板。

公开(公告)号：US20090242881A1

公开(公告)日：2009-10-01

申请号：US12197573

申请日：2008-08-25

申请人： Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

发明人： Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

IPC分类号： H01L33/00

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

摘要翻译： 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。