公开(公告)号：US20230011605A1

公开(公告)日：2023-01-12

申请号：US17590359

申请日：2022-02-01

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Gulbagh SINGH ,  Tsung-Han TSAI

IPC分类号： H01L49/02 ,  H01G4/08 ,  H01L23/522

摘要： A semiconductor device includes a first conductive material, a dielectric structure extending over a top surface of the first conductive material, the dielectric material having a first portion with a first thickness, and a second portion with a second thickness, and a third portion with a third thickness between the first thickness and the second thickness; and a second conductive material extending over the first portion of the dielectric structure. An oxygen-enriched portion of the second conductive material extends along a top surface and a sidewall of the second conductive material. A bottom surface and an interior portion of the second conductive material have an oxygen concentration which is larger than an oxygen concentration of a bottom surface and an interior portion of the second conductive material.

公开(公告)号：US20240063158A1

公开(公告)日：2024-02-22

申请号：US18500279

申请日：2023-11-02

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Gulbagh SINGH ,  Chih-Ming LEE ,  Chi-Yen LIN ,  Wen-Chang KUO ,  C. C. LIU

IPC分类号： H01L23/00 ,  H01L23/522 ,  H01L23/58 ,  H01L23/528 ,  H01L21/78 ,  H01L29/06 ,  H01L23/532 ,  G06F30/392 ,  G06F30/398

CPC分类号： H01L24/06 ,  H01L23/5226 ,  H01L23/585 ,  H01L23/528 ,  H01L21/78 ,  H01L23/562 ,  H01L24/03 ,  H01L29/0649 ,  H01L23/522 ,  H01L23/5329 ,  G06F30/392 ,  G06F30/398 ,  H01L23/544

摘要： A method of making a semiconductor structure includes forming a first contact pad over an interconnect structure. The method further includes forming a second contact pad over the interconnect structure, wherein the second contact pad is electrically separated from the first contact pad. The method further includes depositing a first buffer layer over the interconnect structure, wherein the first buffer layer partially covers the second contact pad, and an edge of the second contact pad extends beyond the first buffer layer.

公开(公告)号：US20230010934A1

公开(公告)日：2023-01-12

申请号：US17584306

申请日：2022-01-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Gulbagh SINGH ,  Tsung-Han TSAI

IPC分类号： H01L27/12 ,  H01L21/84 ,  H01L21/762

摘要： A semiconductor device structure includes a first MOSFET device disposed at a first region of a semiconductor substrate, the first MOSFET device comprises a bulk semiconductor layer contacting the semiconductor substrate, and the bulk semiconductor layer has a first height, a first gate structure disposed over the bulk semiconductor layer, and first S/D regions disposed in the bulk semiconductor layer on opposite sides of the first gate structure; a second MOSFET device disposed at a second region of the semiconductor substrate, the second MOSFET device comprises a semiconductor layer disposed over the semiconductor substrate, and the semiconductor layer has a second height different than the first height, a second gate structure disposed over the semiconductor layer, and second S/D regions disposed in the semiconductor layer on opposite sides of the second gate structure; an insulator between and in contact with the semiconductor substrate and semiconductor layer; and a spacer layer isolating the first and second MOSFET devices, and a portion of the spacer layer is disposed between and in contact with the insulator layer and bulk semiconductor layer.

公开(公告)号：US20220367242A1

公开(公告)日：2022-11-17

申请号：US17815274

申请日：2022-07-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Gulbagh SINGH ,  Tsung-Han TSAI ,  Shih-Lu HSU ,  Kun-Tsang CHUANG

IPC分类号： H01L21/768 ,  H01L23/535 ,  H01L23/532 ,  H01L29/78 ,  H01L21/285 ,  H01L29/45

摘要： A semiconductor device may include a source on a first side of a gate. The semiconductor device may include a drain on a second side of the gate, where the second side of the gate is opposite to the first side of the gate. The semiconductor device may include a first contact over the source. The semiconductor device may include a second contact over the drain. The semiconductor device may include an air gap over the gate between at least the first contact and the second contact. The semiconductor device may include at least two dielectric materials in each of a region between the air gap and the first contact and a region between the air gap and the second contact.

公开(公告)号：US20210384301A1

公开(公告)日：2021-12-09

申请号：US17409144

申请日：2021-08-23

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Gulbagh SINGH ,  Cheng-Yeh HUANG ,  Chin-Nan CHANG ,  Chih-Ming LEE ,  Chi-Yen LIN

IPC分类号： H01L29/40 ,  H01L21/762 ,  H01L21/768 ,  H01L21/324 ,  H01L29/45 ,  H01L21/265

摘要： A method for forming a semiconductor device structure is provided. The method includes forming a semiconductor strip structure over a semiconductor substrate. The semiconductor strip structure has a first doped region and a spacing region connected to the first doped region, and the spacing region is an undoped region. The method includes performing an implantation process over the first doped region and the spacing region to convert a first upper portion of the first doped region and a second upper portion of the spacing region into a continuous disorder region. The method includes forming a metal-semiconductor compound layer over the semiconductor strip structure to continuously cover the first doped region and the spacing region after the implantation process.

公开(公告)号：US20200321296A1

公开(公告)日：2020-10-08

申请号：US16904176

申请日：2020-06-17

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Gulbagh SINGH ,  Chih-Ming LEE ,  Chi-Yen LIN ,  Wen-Chang KUO ,  C. C. LIU

IPC分类号： H01L23/00 ,  H01L23/522 ,  H01L23/58 ,  H01L23/528 ,  H01L21/78 ,  H01L29/06 ,  H01L23/532 ,  G06F30/392 ,  G06F30/398

摘要： A method of designing a layout includes determining a first layout pattern, wherein the first layout pattern corresponds to a plurality of contact pads. The method further includes generating a second layout pattern. The method further includes checking whether an edge of the second layout pattern overlaps the first layout pattern. The method further includes adjusting the second layout pattern so that the edge of the second layout pattern overlaps the first layout pattern in response to a determination that the edge of the second layout pattern is separated from the first layout pattern.

公开(公告)号：US20230378347A1

公开(公告)日：2023-11-23

申请号：US18361585

申请日：2023-07-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Gulbagh SINGH ,  Kun-Tsang CHUANG

IPC分类号： H01L29/78 ,  H01L29/10 ,  H01L29/66

CPC分类号： H01L29/7824 ,  H01L29/1095 ,  H01L29/66681

摘要： A semiconductor structure includes a substrate assembly and a semiconductor device. The semiconductor device is formed on the substrate assembly, and includes a body region, two active regions, and a butted body. The active regions are disposed at two opposite sides of the body region, and both have a first type conductivity. The body region and the active regions together occupy on a surface region of the substrate assembly. The butted body has a second type conductivity different from the first type conductivity, and is located on the surface region of the substrate assembly so as to permit the body region to be tied to one of the active regions through the butted body.

公开(公告)号：US20220208704A1

公开(公告)日：2022-06-30

申请号：US17698794

申请日：2022-03-18

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Gulbagh SINGH ,  Chih-Ming LEE ,  Chi-Yen LIN ,  Wen-Chang KUO ,  C. C. LIU

IPC分类号： H01L23/00 ,  H01L23/522 ,  H01L23/58 ,  H01L23/528 ,  H01L21/78 ,  H01L29/06 ,  H01L23/532 ,  G06F30/392 ,  G06F30/398

摘要： A semiconductor structure includes a first contact pad over an interconnect structure. The semiconductor structure further includes a second contact pad over the interconnect structure, wherein the second contact pad is electrically separated from the first contact pad. The semiconductor structure further includes a first buffer layer over the first contact pad, wherein the first buffer layer is partially over the second contact pad, and an edge of the second contact pad farthest from the first contact pad extends beyond the first buffer layer.

公开(公告)号：US20240203998A1

公开(公告)日：2024-06-20

申请号：US18584971

申请日：2024-02-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Gulbagh SINGH ,  Tsung-Han TSAI

IPC分类号： H01L27/12 ,  H01L21/762 ,  H01L21/84 ,  H01L23/48

CPC分类号： H01L27/1207 ,  H01L21/76224 ,  H01L21/84 ,  H01L23/481

摘要： A semiconductor device structure includes a first MOSFET device disposed at a first region of a semiconductor substrate, the first MOSFET device comprises a bulk semiconductor layer contacting the semiconductor substrate, and the bulk semiconductor layer has a first height, a first gate structure over the bulk semiconductor layer, and first S/D regions disposed in the bulk semiconductor layer on opposite sides of the first gate structure; a second MOSFET device disposed at a second region of the semiconductor substrate, the second MOSFET device comprises a semiconductor layer over the semiconductor substrate, and the semiconductor layer has a second height different than the first height, a second gate structure over the semiconductor layer, and second S/D regions disposed in the semiconductor layer on opposite sides of the second gate structure; an insulator disposed between and in contact with the semiconductor substrate and semiconductor layer; and a spacer layer isolating first and second MOSFET devices, and a portion of the spacer layer is disposed between and in contact with the insulator layer and bulk semiconductor layer.

公开(公告)号：US20240194784A1

公开(公告)日：2024-06-13

申请号：US18584282

申请日：2024-02-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Gulbagh SINGH ,  Hsin-Chi Chen ,  Kun-Tsang Chuang

IPC分类号： H01L29/78 ,  H01L21/02 ,  H01L21/265 ,  H01L21/3065 ,  H01L21/762

CPC分类号： H01L29/7846 ,  H01L21/02532 ,  H01L21/26513 ,  H01L21/3065 ,  H01L21/76237

摘要： The present disclosure describes a method that mitigates the formation of facets in source/drain silicon germanium (SiGe) epitaxial layers. The method includes forming an isolation region around a semiconductor layer and a gate structure partially over the semiconductor layer and the isolation region. Disposing first photoresist structures over the gate structure, a portion of the isolation region, and a portion of the semiconductor layer and doping, with germanium (Ge), exposed portions of the semiconductor layer and exposed portions of the isolation region to form Ge-doped regions that extend from the semiconductor layer to the isolation region. The method further includes disposing second photoresist structures over the isolation region and etching exposed Ge-doped regions in the semiconductor layer to form openings, where the openings include at least one common sidewall with the Ge-doped regions in the isolation region. Finally the method includes growing a SiGe epitaxial stack in the openings.