公开(公告)号：US11646312B2

公开(公告)日：2023-05-09

申请号：US17403732

申请日：2021-08-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chia-Chung Chen ,  Chi-Feng Huang ,  Victor Chiang Liang ,  Fu-Huan Tsai ,  Hsieh-Hung Hsieh ,  Tzu-Jin Yeh ,  Han-Min Tsai ,  Hong-Lin Chu

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/167 ,  H01L29/10 ,  H01L29/423 ,  H01L29/417 ,  H03D7/14 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8238

CPC classification number: H01L27/0886 ,  H01L21/823412 ,  H01L21/823431 ,  H01L29/1033 ,  H01L29/167 ,  H01L29/41783 ,  H01L29/42376 ,  H01L29/66795 ,  H01L29/785 ,  H03D7/1441 ,  H03D7/1458 ,  H01L21/823807 ,  H01L21/823821

Abstract: A method for manufacturing a semiconductor device includes forming one or more fins extending in a first direction over a substrate. The one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction. A dopant is implanted in the first region of the fins but not in the second regions. A gate structure overlies the first region of the fins and source/drains are formed on the second regions of the fins.

公开(公告)号：US10554190B2

公开(公告)日：2020-02-04

申请号：US16133207

申请日：2018-09-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Hong-Lin Chu ,  Hsieh-Hung Hsieh ,  Tzu-Jin Yeh

IPC: H03G3/30 ,  G01R31/382 ,  H03G3/00 ,  H03F3/45 ,  H01M10/48 ,  H03F3/24 ,  H04B1/04

Abstract: A transmitter circuit includes an amplifier configured to output a radio frequency (RF) signal on an output node, a power detection circuit coupled with the output node and configured to generate an output voltage having a first component based on a power level of the RF signal, and a reference voltage generator configured to generate a reference voltage. A comparator is configured to receive the output voltage and the reference voltage, an analog-to-digital converter (ADC) is coupled between the comparator and the amplifier, and the amplifier is configured to adjust the power level of the RF signal responsive to an output of the ADC.

公开(公告)号：US10079583B2

公开(公告)日：2018-09-18

申请号：US15682918

申请日：2017-08-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Hong-Lin Chu ,  Hsieh-Hung Hsieh ,  Tzu-Jin Yeh

IPC: H03C1/62 ,  H04B17/00 ,  H03G3/30 ,  H03F3/24 ,  H01M10/48 ,  H04B1/04 ,  G01R31/36

CPC classification number: H03G3/3042 ,  G01R31/382 ,  H01M10/48 ,  H03F3/24 ,  H03F3/45183 ,  H03G3/001 ,  H04B1/0466 ,  H04B2001/0416

Abstract: A circuit includes a first device between a first input node and an internal node, a second device between a second input node and the internal node, a third device between the internal node and ground, a fourth device between the internal node and an output node, and a fifth device between the output node and ground. The second and third devices generate a direct current (DC) voltage on the internal node by dividing a bias voltage on the second input node. The fourth device generates, from the DC voltage, a first component of an output voltage on the output node. The first and third devices generate a modulation signal on the internal node by dividing a radio frequency (RF) signal on the first input node. The fifth device rectifies the modulation signal to generate a second output voltage component.