公开(公告)号：US20240055300A1

公开(公告)日：2024-02-15

申请号：US17887320

申请日：2022-08-12

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Wei-Ting CHANG ,  Kuo-Ju CHEN ,  Tien-Shun CHANG ,  Su-Hao LIU ,  Huicheng CHANG

IPC分类号： H01L21/8234 ,  H01L29/66

CPC分类号： H01L21/823431 ,  H01L29/66545

摘要： A method includes forming a fin structure over a substrate; depositing a dummy gate layer over the substrate and the fin structure; depositing a hard mask stack over the dummy gate layer; depositing a photoresist bottom layer over the hard mask stack, wherein the photoresist bottom layer has a first stress; performing an implantation process to the photoresist bottom layer to form an implanted bottom layer with a second stress closer to 0 than the first stress; patterning the implanted bottom layer; patterning the hard mask stack and the dummy gate layer by using the patterned implanted bottom layer as an etch mask to form a dummy gate structure over the fin structure; and replacing the dummy gate structure with a metal gate structure.

公开(公告)号：US20230387251A1

公开(公告)日：2023-11-30

申请号：US17824690

申请日：2022-05-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Tien-Shun CHANG ,  Kuo-Ju CHEN ,  Sih-Jie LIU ,  Wei-Fu WANG ,  Yi-Chao WANG ,  Li-Ting WANG ,  Su-Hao LIU ,  Huicheng CHANG ,  Yee-Chia YEO

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/265

CPC分类号： H01L29/66545 ,  H01L29/66795 ,  H01L29/7851 ,  H01L21/265

摘要： A method for manufacturing a semiconductor device includes: forming a patterned structure on a substrate, the patterned structure including a dielectric layer and a dummy gate structure disposed in the dielectric layer; and subjecting the patterned structure to an ion implantation process so as to modulate a profile of the dummy gate structure.

公开(公告)号：US20230093608A1

公开(公告)日：2023-03-23

申请号：US17994153

申请日：2022-11-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tung-Po HSIEH ,  Su-Hao LIU ,  Hong-Chih LIU ,  Jing-Huei HUANG ,  Jie-Huang HUANG ,  Lun-Kuang TAN ,  Huicheng CHANG ,  Liang-Yin CHEN ,  Kuo-Ju CHEN

IPC分类号： H01L21/768 ,  H01L29/66 ,  H01L29/78 ,  H01L23/532 ,  H01L21/8234 ,  H01L23/522 ,  H01L27/088 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/417

摘要： A semiconductor structure is provided. The semiconductor structure includes a gate structure over a substrate. The semiconductor structure also includes source/drain structures on opposite sides of the gate structure. The semiconductor structure also includes a dielectric layer over the gate structure and the source/drain structures. The semiconductor structure also includes a via plug passing through the dielectric layer and including a first group IV element. The dielectric layer includes a second group IV element, a first compound, and a second compound, and the second compound includes elements in the first compound and the first group IV element.

公开(公告)号：US20240030312A1

公开(公告)日：2024-01-25

申请号：US17871882

申请日：2022-07-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Kuo-Ju CHEN ,  Wei-Ting CHANG ,  Po-Kang HO ,  Su-Hao LIU ,  Yee-Chia YEO

IPC分类号： H01L29/66

CPC分类号： H01L29/66545 ,  H01L29/66795

摘要： A method includes forming a fin structure over a substrate; depositing a dummy gate layer over the substrate and the fin structure; etching back the dummy gate layer; performing an implantation process to the dummy gate layer to form an implantation region in the dummy gate layer, wherein a vertical thickness of the dummy gate layer is greater than a vertical thickness of the implantation region; forming a patterned hard mask stack over the implantation region; patterning the implantation region and the dummy gate layer by using the patterned hard mask stack as an etch mask to form a dummy gate structure over the fin structure; and replacing the dummy gate structure with a metal gate structure.