公开(公告)号：US11373879B2

公开(公告)日：2022-06-28

申请号：US17019234

申请日：2020-09-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Tung-Kai Chen ,  Ching-Hsiang Tsai ,  Kao-Feng Liao ,  Chih-Chieh Chang ,  Chun-Hao Kung ,  Fang-I Chih ,  Hsin-Ying Ho ,  Chia-Jung Hsu ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: H01L21/321 ,  H01L21/3105 ,  H01L21/28

Abstract: A planarization method and a CMP method are provided. The planarization method includes providing a substrate with a first region and a second region having different degrees of hydrophobicity or hydrophilicity and performing a surface treatment to the first region to render the degrees of hydrophobicity or hydrophilicity in proximity to that of the second region. The CMP method includes providing a substrate with a first region and a second region; providing a polishing slurry on the substrate, wherein the polishing slurry and the surface of the first region have a first contact angle, and the polishing slurry and the surface of the first region have a second contact angle; modifying the surface of the first region to make a contact angle difference between the first contact angle and the second contact angle equal to or less than 30 degrees.

公开(公告)号：US20240379595A1

公开(公告)日：2024-11-14

申请号：US18313853

申请日：2023-05-08

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsiang-Ku Shen ,  Chun-Wen Hsiao ,  Fang-I Chih ,  Wen-Ling Chang

IPC: H01L23/00 ,  H01L21/311 ,  H01L21/321 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A method includes providing a workpiece having a first conductive pad and a second conductive pad over a substrate, a topmost point of the second conductive pad is above that of the first conductive pad by a height difference, conformally forming a first etch stop layer on the first and the second conductive pads, forming a dielectric structure over the first etch stop layer, performing a planarization process to the dielectric structure, and after the performing of the planarization process, conformally depositing a dielectric layer over the workpiece, the dielectric layer including a first portion disposed directly over the first conductive pad and a second portion disposed directly over the second conductive pad, where a thickness difference between a thickness of the first portion of the dielectric layer and a thickness of the second portion of the dielectric layer is less than the height difference.

公开(公告)号：US11217479B2

公开(公告)日：2022-01-04

申请号：US16246125

申请日：2019-01-11

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsin-Ying Ho ,  Fang-I Chih ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: H01L21/768

Abstract: A multiple metallization scheme in conductive features of a device uses ion implantation in a first metal layer to make a portion of the first metal layer soluble to a wet cleaning agent. The soluble portion may then be removed by a wet cleaning process and a subsequent second metal layer deposited over the first metal layer. An additional layer may be formed by a second ion implantation in the second metal layer may be used to make a controllable portion of the second metal layer soluble to a wet cleaning agent. The soluble portion of the second metal layer may be removed by a wet cleaning process. The process of depositing metal layers, implanting ions, and removing soluble portions, may be repeated until a desired number of metal layers are provided.

公开(公告)号：US20240282628A1

公开(公告)日：2024-08-22

申请号：US18358662

申请日：2023-07-25

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Dian-Hau CHEN ,  Chen-Chiu HUANG ,  Hsiang-Ku SHEN ,  ShuFang CHEN ,  Ying-Yao LAI ,  Wen-Ling CHANG ,  Chi-Feng LIN ,  Peng-Chung JANGJIAN ,  Jo-Lin LAN ,  Fang-I Chih

IPC: H01L21/768 ,  H01L21/02 ,  H01L23/522

CPC classification number: H01L21/76873 ,  H01L21/02112 ,  H01L21/76843 ,  H01L23/5226

Abstract: A method of forming a semiconductor structure includes forming a seed layer on a substrate, forming a photoresist layer on the seed layer with a first opening wider than a second opening, performing an electroplating process with a first plating current to grow a bottom portion of a first metal line in the first opening and a bottom portion of a second metal line in the second opening, continuing the electroplating process with a second plating current that is larger than the first plating current to grow a top portion of the first metal line and a top portion of the second metal line, removing the photoresist layer to expose a portion of the seed layer, and removing the exposed portion of the seed layer.

公开(公告)号：US10777423B2

公开(公告)日：2020-09-15

申请号：US16003111

申请日：2018-06-08

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Tung-Kai Chen ,  Ching-Hsiang Tsai ,  Kao-Feng Liao ,  Chih-Chieh Chang ,  Chun-Hao Kung ,  Fang-I Chih ,  Hsin-Ying Ho ,  Chia-Jung Hsu ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: H01L21/321 ,  H01L21/3105 ,  H01L21/28

Abstract: A planarization method and a CMP method are provided. The planarization method includes providing a substrate with a first region and a second region having different degrees of hydrophobicity or hydrophilicity and performing a surface treatment to the first region to render the degrees of hydrophobicity or hydrophilicity in proximity to that of the second region. The CMP method includes providing a substrate with a first region and a second region; providing a polishing slurry on the substrate, wherein the polishing slurry and the surface of the first region have a first contact angle, and the polishing slurry and the surface of the first region have a second contact angle; modifying the surface of the first region to make a contact angle difference between the first contact angle and the second contact angle equal to or less than 30 degrees.

公开(公告)号：US12300508B2

公开(公告)日：2025-05-13

申请号：US17847290

申请日：2022-06-23

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Tung-Kai Chen ,  Ching-Hsiang Tsai ,  Kao-Feng Liao ,  Chih-Chieh Chang ,  Chun-Hao Kung ,  Fang-I Chih ,  Hsin-Ying Ho ,  Chia-Jung Hsu ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: H01L21/321 ,  H01L21/28 ,  H01L21/3105

Abstract: A planarization method includes: providing a substrate, wherein the substrate includes a first region and a second region having different degrees of hydrophobicity or hydrophilicity, the second region covering an upper surface of the first region; polishing the substrate with a polishing slurry until the upper surface of the first region is exposed; and continuing polishing and performing a surface treatment by the polishing slurry to adjust the degree of hydrophobicity or hydrophilicity of at least one of the first region and the second region. The polishing slurry and the upper surface of the second region have a first contact angle, and the polishing slurry and the upper surface of the first region have a second contact angle. The surface treatment keeps a contact angle difference between the first contact angle and the second contact angle being equal to or less than 30 degrees during the polishing.

公开(公告)号：US20200043784A1

公开(公告)日：2020-02-06

申请号：US16246125

申请日：2019-01-11

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsin-Ying Ho ,  Fang-I Chih ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: H01L21/768

Abstract: A multiple metallization scheme in conductive features of a device uses ion implantation in a first metal layer to make a portion of the first metal layer soluble to a wet cleaning agent. The soluble portion may then be removed by a wet cleaning process and a subsequent second metal layer deposited over the first metal layer. An additional layer may be formed by a second ion implantation in the second metal layer may be used to make a controllable portion of the second metal layer soluble to a wet cleaning agent. The soluble portion of the second metal layer may be removed by a wet cleaning process. The process of depositing metal layers, implanting ions, and removing soluble portions, may be repeated until a desired number of metal layers are provided.