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公开(公告)号:US20180111824A1
公开(公告)日:2018-04-26
申请号:US15333520
申请日:2016-10-25
Inventor: TZU-HENG WU , CHIA-HUA CHU , YI-HENG TSAI , CHENG SAN CHOU , CHEN HSIUNG YANG
CPC classification number: B81B7/008 , B81B2207/096 , B81B2207/115 , B81C1/00246 , B81C2201/053 , B81C2203/0728
Abstract: A semiconductor structure includes a first substrate, a second substrate disposed over the first substrate, and including a first surface, a second surface opposite to the first surface, a via portion extending between the first surface and the second surface, a first through hole and a second through hole, and a device disposed over the second surface, and including a dielectric layer, a backplate at least partially exposed from the dielectric layer and a membrane at least partially exposed from the dielectric layer and disposed between the backplate and the first substrate, wherein the via portion is disposed within the second through hole, and the dielectric layer is bonded with the second substrate, and the device is electrically connected to the first substrate through the via portion.
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公开(公告)号:US20200346926A1
公开(公告)日:2020-11-05
申请号:US16932622
申请日:2020-07-17
Inventor: WEI-CHENG SHEN , YI-HSIEN CHANG , YI-HENG TSAI , CHUN-REN CHENG
IPC: B81C1/00
Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer; providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer, wherein the formation of the plurality of scribe lines includes removing portions of the second wafer from the second surface towards the first surface to form a third surface between the first surface and the second surface, and the plurality of scribe lines protrudes from the third surface of the second wafer.
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公开(公告)号:US20230365403A1
公开(公告)日:2023-11-16
申请号:US18359889
申请日:2023-07-27
Inventor: WEI-CHENG SHEN , YI-HSIEN CHANG , YI-HENG TSAI , CHUN-REN CHENG
IPC: B81C1/00
CPC classification number: B81C1/00825 , B81B2203/0323 , B81C2203/0785
Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer; providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer, wherein the formation of the plurality of scribe lines includes removing portions of the second wafer from the second surface towards the first surface to form a third surface between the first surface and the second surface, and the plurality of scribe lines protrudes from the third surface of the second wafer.
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公开(公告)号:US20170341933A1
公开(公告)日:2017-11-30
申请号:US15168848
申请日:2016-05-31
Inventor: WEI-CHENG SHEN , YI-HSIEN CHANG , YI-HENG TSAI , CHUN-REN CHENG
IPC: B81C1/00
Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer, providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer; wherein the plurality of scribe lines protrudes from a third surface of the second wafer, and the third surface is between the first surface and the second surface.
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公开(公告)号:US20170297901A1
公开(公告)日:2017-10-19
申请号:US15498009
申请日:2017-04-26
Inventor: FU-CHUN HUANG , LI-CHEN YEN , TZU-HENG WU , YI-HENG TSAI , CHUN-REN CHENG
CPC classification number: B81B3/0086 , B81B3/0008 , B81B2203/0307 , B81B2207/015 , B81B2207/07 , B81C1/00246 , B81C2201/0132 , B81C2201/0181 , B81C2203/035
Abstract: A method of manufacturing a semiconductor structure includes receiving a first substrate including a dielectric layer disposed over the first substrate; forming a sensing structure and a bonding structure over the dielectric layer; disposing a conductive layer on the sensing structure; disposing a barrier layer over the dielectric layer; removing a first portion of the barrier layer to at least partially expose the conductive layer on the sensing structure; and removing a second portion of the barrier layer to at least partially expose the bonding structure.
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