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公开(公告)号：US20160362292A1
公开(公告)日：2016-12-15
申请号：US14739419
申请日：2015-06-15
Inventor： YI-HSIEN CHANG , CHUN-WEN CHENG , CHUN-REN CHENG , SHIH-WEI LIN , WEI-CHENG SHEN
CPC classification number: B81B3/001 , B81B2201/0257 , B81B2207/015 , B81C1/00182 , H04R19/00 , H04R19/005 , H04R19/04 , H04R31/00
Abstract: A semiconductor structure includes a first device and a second device. The first device includes a plate including a plurality of apertures, a membrane disposed opposite to the plate and including a plurality of corrugations facing the plurality of apertures, and a conductive plug extending from the plate through the membrane. The second device includes a substrate and a bond pad disposed over the substrate, wherein the conductive plug is bonded with the bond pad to integrate the first device with the second device, and the plate is an epitaxial (EPI) silicon layer or a silicon-on-insulator (SOI) substrate.
Abstract translation: 半导体结构包括第一器件和第二器件。 所述第一装置包括包括多个孔的板，与所述板相对设置并且包括面对所述多个孔的多个波纹的膜，以及从所述板延伸通过所述膜延伸的导电塞。 第二装置包括衬底和设置在衬底上的接合焊盘，其中导电插塞与接合焊盘接合以将第一器件与第二器件集成，并且该板是外延（EPI）硅层或硅 - 绝缘体（SOI）衬底。
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公开(公告)号：US20220185656A1
公开(公告)日：2022-06-16
申请号：US17687230
申请日：2022-03-04
Inventor： YI-HSIEN CHANG , CHUN-REN CHENG , WEI-CHENG SHEN , WEN-CHIEN CHEN
Abstract: A method of manufacturing a semiconductor structure includes following operations. A first substrate is provided. A plate is formed over the first substrate. The plate includes a first tensile member, a second tensile member, a semiconductive member between the first tensile member and the second tensile member, and a plurality of apertures penetrating the first tensile member, the semiconductive member and the second tensile member. A membrane is formed over and separated from the plate. The membrane include a plurality of holes. A plurality of conductive plugs passing through the plate or membrane are formed. A plurality of semiconductive pads are formed over the plurality of conductive plugs. The plate is bonded to a second substrate. The second substrate includes a plurality of bond pads, and the semiconductive pads are in contact with the bond pads.
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公开(公告)号：US20230365403A1
公开(公告)日：2023-11-16
申请号：US18359889
申请日：2023-07-27
Inventor： WEI-CHENG SHEN , YI-HSIEN CHANG , YI-HENG TSAI , CHUN-REN CHENG
IPC: B81C1/00
CPC classification number: B81C1/00825 , B81B2203/0323 , B81C2203/0785
Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer; providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer, wherein the formation of the plurality of scribe lines includes removing portions of the second wafer from the second surface towards the first surface to form a third surface between the first surface and the second surface, and the plurality of scribe lines protrudes from the third surface of the second wafer.
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Patent Agency Ranking
公开(公告)号：US20170341933A1
公开(公告)日：2017-11-30
申请号：US15168848
申请日：2016-05-31
Inventor： WEI-CHENG SHEN , YI-HSIEN CHANG , YI-HENG TSAI , CHUN-REN CHENG
IPC: B81C1/00
Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer, providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer; wherein the plurality of scribe lines protrudes from a third surface of the second wafer, and the third surface is between the first surface and the second surface.
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公开(公告)号：US20240286889A1
公开(公告)日：2024-08-29
申请号：US18655356
申请日：2024-05-06
Inventor： CHING-KAI SHEN , JUNG-KUO TU , WEI-CHENG SHEN , YI-CHUAN TENG
CPC classification number: B81B3/0021 , B81C1/00047 , B81B2203/0127 , B81B2203/0315 , B81B2203/0376 , B81B2203/0384 , B81B2203/0392 , B81B2203/04 , B81B2207/07
Abstract: A method for forming a semiconductor structure includes following operations. An interconnect structure is formed over a substrate. The interconnect structure includes a top conductive layer. A dielectric structure is formed over the interconnect structure. The dielectric structure is patterned to simultaneously form a cavity and a protrusion in the cavity. A MEMS substrate is bonded to the dielectric structure to seal the cavity. The protrusion is separated from the MEMS substrate.
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公开(公告)号：US20170029268A1
公开(公告)日：2017-02-02
申请号：US14815220
申请日：2015-07-31
Inventor： YI-HSIEN CHANG , CHUN-REN CHENG , WEI-CHENG SHEN , WEN-CHIEN CHEN
Abstract: A semiconductor structure includes a first device and a second device. The first device includes a plate including a plurality of apertures; a membrane disposed opposite to the plate and including a plurality of corrugations, and a conductive plug extending through the plate and the membrane. The second device includes a substrate and a bond pad disposed over the substrate, wherein the conductive plug is bonded with the bond pad to integrate the first device with the second device, and the plate includes a semiconductive member and a tensile member, and the semiconductive member is disposed within the tensile member.
Abstract translation: 半导体结构包括第一器件和第二器件。 第一装置包括包括多个孔的板; 与所述板相对设置并且包括多个波纹的膜，以及延伸穿过所述板和所述膜的导电塞。 第二装置包括衬底和布置在衬底上的接合焊盘，其中导电插塞与接合焊盘接合，以将第一器件与第二器件集成，并且该板包括半导体构件和抗拉构件，并且半导体 构件设置在拉伸构件内。
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公开(公告)号：US20220340408A1
公开(公告)日：2022-10-27
申请号：US17239006
申请日：2021-04-23
Inventor： CHING-KAI SHEN , JUNG-KUO TU , WEI-CHENG SHEN , YI-CHUAN TENG
Abstract: A semiconductor structure includes a substrate, a MEMS substrate, a dielectric structure between the substrate and the MEMS substrate, a cavity in the dielectric structure, an electrode over the substrate, and a protrusion disposed in the cavity. The MEMS substrate includes a movable membrane, and the cavity is sealed by the movable membrane. A height of the protrusion is less than a depth of the cavity.
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公开(公告)号：US20200346926A1
公开(公告)日：2020-11-05
申请号：US16932622
申请日：2020-07-17
Inventor： WEI-CHENG SHEN , YI-HSIEN CHANG , YI-HENG TSAI , CHUN-REN CHENG
IPC: B81C1/00
Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer; providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer, wherein the formation of the plurality of scribe lines includes removing portions of the second wafer from the second surface towards the first surface to form a third surface between the first surface and the second surface, and the plurality of scribe lines protrudes from the third surface of the second wafer.
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