LAYOUT FOR REDUCED CROSS-TALK IN COMMON TERMINAL TRANSISTOR

    公开(公告)号:US20190137546A1

    公开(公告)日:2019-05-09

    申请号:US15947389

    申请日:2018-04-06

    Abstract: A microelectronic device has a common terminal transistor with two or more channels, and sense transistors in corresponding areas of the channels. The channels and the sense transistors share a common node in a semiconductor substrate. The sense transistors are configured to provide sense currents that are representative of currents through the corresponding channels. The sense transistors are located so that a ratio of the channel currents to the corresponding sense currents have less than a target value of cross-talk. The microelectronic device may be implemented without a compensation circuit which provides a compensation signal used to adjust one or more of the sense currents to reduce cross-talk. A method of forming the microelectronic device, including estimating a potential distribution in the semiconductor substrate containing the common node of the common terminal transistor, and selecting locations for the sense transistors based on the estimated potential distribution, is disclosed.

    Charge pump circuit
    2.
    发明授权
    Charge pump circuit 有权
    电荷泵电路

    公开(公告)号:US09013229B2

    公开(公告)日:2015-04-21

    申请号:US13942182

    申请日:2013-07-15

    CPC classification number: H02M3/073 H02M2003/076

    Abstract: A charge pump circuit includes a plurality of serially coupled stages and a plurality of clock drivers. A voltage output of a first of the stages is connected to a voltage input of a second of the stages. A voltage output of the second of the stages is boosted relative to a voltage input of the second of the stages. Each of the stages includes complementary charge pumps. Each of the charge pumps includes a pumping capacitor that stores charge in the stage. Each of the clock drivers drives a clock signal to the pumping capacitor of at least one of the stages. A voltage of the clock signal provided to the second of the stages is derived from the voltage input of the second of the stages.

    Abstract translation: 电荷泵电路包括多个串联耦合级和多个时钟驱动器。 第一级的电压输出连接到第二级的电压输入。 第二级的电压输出相对于第二级的电压输入被提升。 每个阶段都包括补充电荷泵。 每个电荷泵包括在电池中存储电荷的泵送电容器。 每个时钟驱动器驱动至少一个级的泵浦电容器的时钟信号。 提供给第二级的时钟信号的电压从第二级的电压输入导出。

    APPARATUS AND SYSTEM TO SUPPRESS ANALOG FRONT END NOISE INTRODUCED BY CHARGE-PUMP THROUGH EMPLOYMENT OF CHARGE-PUMP SKIPPING
    3.
    发明申请
    APPARATUS AND SYSTEM TO SUPPRESS ANALOG FRONT END NOISE INTRODUCED BY CHARGE-PUMP THROUGH EMPLOYMENT OF CHARGE-PUMP SKIPPING 有权
    装置和系统,以通过充电泵排出的方式来阻止充电泵引起的模拟前端噪声

    公开(公告)号:US20130176155A1

    公开(公告)日:2013-07-11

    申请号:US13782902

    申请日:2013-03-01

    Abstract: An apparatus, comprising: a charge-pump; a sampler that samples an optical signal, including: a black sampler; a video sampler; and an analog to digital converter. The first aspect further provides a single clock that is coupled to and provides clocking signals to: a) the charge-pump logic that is coupled to the charge-pump; and b) the sampler logic that is coupled to the sampler that samples the optical signal, wherein if the clock for the charge pump is running faster than an analog front end (“AFE”) video sampling clock, a state-machine control is configured to: skip the charge pump clock period right before a video sample signal falling edge, thereby recovering to a normal operation the next charge-pump clock period, wherein this duty cycle modulation of charge pump clock will not substantially impact charge pump output.

    Abstract translation: 一种装置,包括:电荷泵; 采样器采样光信号,包括:黑色采样器; 视频采样器; 和模数转换器。 第一方面还提供了一个单个时钟,其耦合到并提供时钟信号以便:a)耦合到电荷泵的电荷泵逻辑; 以及b)耦合到采样器的采样器逻辑,其对光信号进行采样,其中如果电荷泵的时钟运行比模拟前端(“AFE”)视频采样时钟快,则配置状态机控制 到:在视频采样信号下降沿之前跳过电荷泵时钟周期,从而恢复下一个电荷泵时钟周期的正常操作,其中电荷泵时钟的这种占空比调制将不会基本上影响电荷泵输出。

    PROTECTION CIRCUIT FOR POWER SWITCH
    4.
    发明公开

    公开(公告)号:US20240259010A1

    公开(公告)日:2024-08-01

    申请号:US18455656

    申请日:2023-08-25

    CPC classification number: H03K17/0812

    Abstract: A transistor is coupled between a first voltage input and a voltage output in a first current path. First circuitry is coupled to a second voltage input, a control terminal of the transistor, and the voltage output. Second circuitry is coupled between the control terminal and ground in a second current path and between the control terminal and ground in a third current path parallel to the second current path. The second current path includes the control terminal, first and second terminals of the second circuitry, and ground. The third current path includes the control terminal, a second and the third terminal of the second circuitry, and ground. Third circuitry is coupled between the control terminal and the voltage output in a fourth current path. The fourth current path includes the control terminal, first and second terminals of the third circuitry, and the voltage output.

    Layout for reduced cross-talk in common terminal transistor

    公开(公告)号:US10670638B2

    公开(公告)日:2020-06-02

    申请号:US15947389

    申请日:2018-04-06

    Abstract: A microelectronic device has a common terminal transistor with two or more channels, and sense transistors in corresponding areas of the channels. The channels and the sense transistors share a common node in a semiconductor substrate. The sense transistors are configured to provide sense currents that are representative of currents through the corresponding channels. The sense transistors are located so that a ratio of the channel currents to the corresponding sense currents have less than a target value of cross-talk. The microelectronic device may be implemented without a compensation circuit which provides a compensation signal used to adjust one or more of the sense currents to reduce cross-talk. A method of forming the microelectronic device, including estimating a potential distribution in the semiconductor substrate containing the common node of the common terminal transistor, and selecting locations for the sense transistors based on the estimated potential distribution, is disclosed.

    Low quiescent current load switch

    公开(公告)号:US10432175B2

    公开(公告)日:2019-10-01

    申请号:US16119457

    申请日:2018-08-31

    Abstract: Apparatus, devices, and systems to provide a low quiescent current load switch are disclosed. A disclosed load switch circuit includes a transconductor to convert a voltage to a current input to a transistor gate, the current input to the transistor gate to control the gate to deliver power to a load from a power supply. The example circuit includes a resistor to provide power from a charge pump to the gate as controlled by the transconductor. A disclosed apparatus includes a driver to control a gate of a transistor, the gate to enable the transistor to deliver power to a load from a power supply when the gate is activated, and a gate slope control to control a rate of change over time of a voltage associated with the gate to activate the gate and to disable the driver when the gate is activated.

    Apparatus and system to suppress analog front end noise introduced by charge-pump through employment of charge-pump skipping
    7.
    发明授权
    Apparatus and system to suppress analog front end noise introduced by charge-pump through employment of charge-pump skipping 有权
    通过使用电荷泵跳跃来抑制由电荷泵引入的模拟前端噪声的装置和系统

    公开(公告)号:US08730075B2

    公开(公告)日:2014-05-20

    申请号:US13782902

    申请日:2013-03-01

    Abstract: An apparatus, comprising: a charge-pump; a sampler that samples an optical signal, including: a black sampler; a video sampler; and an analog to digital converter. The first aspect further provides a single clock that is coupled to and provides clocking signals to: a) the charge-pump logic that is coupled to the charge-pump; and b) the sampler logic that is coupled to the sampler that samples the optical signal, wherein if the clock for the charge pump is running faster than an analog front end (“AFE”) video sampling clock, a state-machine control is configured to: skip the charge pump clock period right before a video sample signal falling edge, thereby recovering to a normal operation the next charge-pump clock period, wherein this duty cycle modulation of charge pump clock will not substantially impact charge pump output.

    Abstract translation: 一种装置,包括:电荷泵; 采样器采样光信号,包括:黑色采样器; 视频采样器; 和模数转换器。 第一方面还提供了一个单个时钟,其耦合到并提供时钟信号以便:a)耦合到电荷泵的电荷泵逻辑; 以及b)耦合到采样器的采样器逻辑,其对光信号进行采样,其中如果电荷泵的时钟运行比模拟前端(“AFE”)视频采样时钟快,则配置状态机控制 到:在视频采样信号下降沿之前跳过电荷泵时钟周期,从而恢复下一个电荷泵时钟周期的正常操作,其中电荷泵时钟的这种占空比调制将不会基本上影响电荷泵输出。

    Temperature sensor circuit for relative thermal sensing

    公开(公告)号:US11781920B2

    公开(公告)日:2023-10-10

    申请号:US17706113

    申请日:2022-03-28

    CPC classification number: G01K7/021 G01K7/16

    Abstract: An example device includes a first temperature sensor configured to provide a first current signal indicative of a temperature of a first circuit based on a voltage of a first temperature sensing element. The first circuit includes a power switch device and the first temperature sensing element. A second temperature sensor is configured to provide a second current signal indicative of temperature of a second circuit based on a voltage of a second temperature sensing element. The second circuit includes the second temperature sensing element. A trim circuit is configured to trim current in at least one of the first temperature sensor or the second temperature sensor to compensate for mismatch between temperature coefficients of the first and second temperature sensing elements.

    Temperature sensor circuit for relative thermal sensing

    公开(公告)号:US11320320B2

    公开(公告)日:2022-05-03

    申请号:US16395860

    申请日:2019-04-26

    Abstract: An example device includes a first temperature sensor configured to provide a first current signal indicative of a temperature of a first circuit based on a voltage of a first temperature sensing element. The first circuit includes a power switch device and the first temperature sensing element. A second temperature sensor is configured to provide a second current signal indicative of temperature of a second circuit based on a voltage of a second temperature sensing element. The second circuit includes the second temperature sensing element. A trim circuit is configured to trim current in at least one of the first temperature sensor or the second temperature sensor to compensate for mismatch between temperature coefficients of the first and second temperature sensing elements.

    LAYOUT FOR REDUCED CROSS-TALK IN COMMON TERMINAL TRANSISTOR

    公开(公告)号:US20200174045A1

    公开(公告)日:2020-06-04

    申请号:US16783436

    申请日:2020-02-06

    Abstract: A microelectronic device has a common terminal transistor with two or more channels, and sense transistors in corresponding areas of the channels. The channels and the sense transistors share a common node in a semiconductor substrate. The sense transistors are configured to provide sense currents that are representative of currents through the corresponding channels. The sense transistors are located so that a ratio of the channel currents to the corresponding sense currents have less than a target value of cross-talk. The microelectronic device may be implemented without a compensation circuit which provides a compensation signal used to adjust one or more of the sense currents to reduce cross-talk. A method of forming the microelectronic device, including estimating a potential distribution in the semiconductor substrate containing the common node of the common terminal transistor, and selecting locations for the sense transistors based on the estimated potential distribution, is disclosed.

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