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公开(公告)号：US11574902B2
公开(公告)日：2023-02-07
申请号：US16264065
申请日：2019-01-31
摘要： A system includes a clamp network coupled between an input and an output and configured to clamp a voltage between the input and the output to a first clamp voltage based on the presence of a trigger signal and to a second clamp voltage based on the absence of the trigger signal. The second clamp voltage is greater than the first clamp voltage and the first clamp voltage is less than a breakdown voltage of the power transistor device. A detector circuit is coupled to the input and the output. A power transistor device may also be coupled between the input and the output. The detector circuit is configured to detect a pulse signal at the input or the output while the power transistor device is off and to generate the trigger signal for a time interval based on detecting the pulse signal.
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2.发明申请APPARATUS AND SYSTEM TO SUPPRESS ANALOG FRONT END NOISE INTRODUCED BY CHARGE-PUMP THROUGH EMPLOYMENT OF CHARGE-PUMP SKIPPING 有权装置和系统，以通过充电泵排出的方式来阻止充电泵引起的模拟前端噪声公开(公告)号：US20130176155A1
公开(公告)日：2013-07-11
申请号：US13782902
申请日：2013-03-01
发明人： Sualp Aras , Guhaprakash Amudhan , Abidur Rahman , Xiaochun Zhao
IPC分类号： H03M1/08
CPC分类号： H03M1/00 , G11C27/026 , H02M3/07 , H03L7/18 , H03M1/0818 , H03M1/12 , H04N3/155 , H04N5/335 , H04N5/3577
摘要： An apparatus, comprising: a charge-pump; a sampler that samples an optical signal, including: a black sampler; a video sampler; and an analog to digital converter. The first aspect further provides a single clock that is coupled to and provides clocking signals to: a) the charge-pump logic that is coupled to the charge-pump; and b) the sampler logic that is coupled to the sampler that samples the optical signal, wherein if the clock for the charge pump is running faster than an analog front end (“AFE”) video sampling clock, a state-machine control is configured to: skip the charge pump clock period right before a video sample signal falling edge, thereby recovering to a normal operation the next charge-pump clock period, wherein this duty cycle modulation of charge pump clock will not substantially impact charge pump output.
摘要翻译： 一种装置，包括：电荷泵; 采样器采样光信号，包括：黑色采样器; 视频采样器; 和模数转换器。 第一方面还提供了一个单个时钟，其耦合到并提供时钟信号以便：a）耦合到电荷泵的电荷泵逻辑; 以及b）耦合到采样器的采样器逻辑，其对光信号进行采样，其中如果电荷泵的时钟运行比模拟前端（“AFE”）视频采样时钟快，则配置状态机控制 到：在视频采样信号下降沿之前跳过电荷泵时钟周期，从而恢复下一个电荷泵时钟周期的正常操作，其中电荷泵时钟的这种占空比调制将不会基本上影响电荷泵输出。
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3.发明授权Apparatus and system to suppress analog front end noise introduced by charge-pump through employment of charge-pump skipping 有权通过使用电荷泵跳跃来抑制由电荷泵引入的模拟前端噪声的装置和系统公开(公告)号：US08730075B2
公开(公告)日：2014-05-20
申请号：US13782902
申请日：2013-03-01
发明人： Sualp Aras , Guhaprakash Amudhan , Abidur Rahman , Xiaochun Zhao
CPC分类号： H03M1/00 , G11C27/026 , H02M3/07 , H03L7/18 , H03M1/0818 , H03M1/12 , H04N3/155 , H04N5/335 , H04N5/3577
摘要： An apparatus, comprising: a charge-pump; a sampler that samples an optical signal, including: a black sampler; a video sampler; and an analog to digital converter. The first aspect further provides a single clock that is coupled to and provides clocking signals to: a) the charge-pump logic that is coupled to the charge-pump; and b) the sampler logic that is coupled to the sampler that samples the optical signal, wherein if the clock for the charge pump is running faster than an analog front end (“AFE”) video sampling clock, a state-machine control is configured to: skip the charge pump clock period right before a video sample signal falling edge, thereby recovering to a normal operation the next charge-pump clock period, wherein this duty cycle modulation of charge pump clock will not substantially impact charge pump output.
摘要翻译： 一种装置，包括：电荷泵; 采样器采样光信号，包括：黑色采样器; 视频采样器; 和模数转换器。 第一方面还提供了一个单个时钟，其耦合到并提供时钟信号以便：a）耦合到电荷泵的电荷泵逻辑; 以及b）耦合到采样器的采样器逻辑，其对光信号进行采样，其中如果电荷泵的时钟运行比模拟前端（“AFE”）视频采样时钟快，则配置状态机控制 到：在视频采样信号下降沿之前跳过电荷泵时钟周期，从而恢复下一个电荷泵时钟周期的正常操作，其中电荷泵时钟的这种占空比调制将不会基本上影响电荷泵输出。
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公开(公告)号：US10821922B2
公开(公告)日：2020-11-03
申请号：US15212535
申请日：2016-07-18
IPC分类号： G06F1/32 , B60R16/03 , G06F1/3203 , G06F1/3287
摘要： One example includes a power control system. The power control system includes an activation controller that is powered via a first power voltage generated via a first power supply and is configured to provide an enable signal. The activation controller can assert the enable signal in response to an input activation signal to control activation of a second power supply. The second power supply can generate a second power voltage in response to the enable signal being asserted. The second power voltage can be provided to regulate power associated with ancillary electronic circuitry. The system also includes a deactivation controller that is powered via the second power voltage and is configured to generate a disable signal to de-assert the enable signal in response to one of a plurality of predetermined deactivation conditions.
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公开(公告)号：US09743188B2
公开(公告)日：2017-08-22
申请号：US14925416
申请日：2015-10-28
发明人： Xiaochun Zhao , Jim Kien Huy Le
IPC分类号： H04R29/00 , H04R5/04 , H01R24/58 , H01R107/00
CPC分类号： H04R5/04 , H01R24/58 , H01R2107/00 , H04R2420/09
摘要： Systems and methods for audio plug type detection excursion are described. In some embodiments, a method may include: receiving an audio plug at an audio jack; grounding a sleeve terminal of the audio jack; applying an electrical current to a second ring terminal of the audio jack; and measuring a voltage between the second ring terminal and the sleeve terminal. In other embodiments an electronic circuit may include a controller and a memory coupled to the controller, the memory having program instructions stored thereon that, upon execution by the controller, cause the controller to: ground a sleeve terminal of an audio jack; apply an electrical current to a second ring terminal of the audio jack; and measure a voltage between the second ring terminal and the sleeve terminal.
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公开(公告)号：US20160269842A1
公开(公告)日：2016-09-15
申请号：US14925416
申请日：2015-10-28
发明人： Xiaochun Zhao , Jim Kien Huy Le
CPC分类号： H04R5/04 , H01R24/58 , H01R2107/00 , H04R2420/09
摘要： Systems and methods for audio plug type detection excursion are described. In some embodiments, a method may include: receiving an audio plug at an audio jack; grounding a sleeve terminal of the audio jack; applying an electrical current to a second ring terminal of the audio jack; and measuring a voltage between the second ring terminal and the sleeve terminal. In other embodiments an electronic circuit may include a controller and a memory coupled to the controller, the memory having program instructions stored thereon that, upon execution by the controller, cause the controller to: ground a sleeve terminal of an audio jack; apply an electrical current to a second ring terminal of the audio jack; and measure a voltage between the second ring terminal and the sleeve terminal.
摘要翻译： 描述音频插头型检测偏移的系统和方法。 在一些实施例中，一种方法可以包括：在音频插孔处接收音频插头; 接地音频插孔的套筒端子; 将电流施加到音频插孔的第二环形端子; 并测量第二环形端子和套筒端子之间的电压。 在其他实施例中，电子电路可以包括控制器和耦合到控制器的存储器，存储器具有存储在其上的程序指令，其在由控制器执行时使控制器：将音频插孔的套筒端子接地; 将电流施加到音频插孔的第二环形端子; 并测量第二环形端子和套筒端子之间的电压。
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公开(公告)号：US10079538B2
公开(公告)日：2018-09-18
申请号：US15296733
申请日：2016-10-18
发明人： Xiaochun Zhao , Hasibur Rahman , Artur Lewinski , Tulong Yang
CPC分类号： H02M3/07 , H02M3/1582 , H03K2217/0081
摘要： A circuit includes a charge pump to generate an output reference voltage. A first bootstrap refresh circuit receives the reference voltage from the charge pump and is coupled between first and second bootstrap nodes of a DC/DC converter. The first bootstrap refresh circuit supplies first charge current that is sourced from the first bootstrap node to the second bootstrap node based on a control signal indicating a first operating mode of the DC/DC converter. A second bootstrap refresh circuit receives the reference voltage from the charge pump and is coupled between the first and second bootstrap nodes of the DC/DC converter. The second bootstrap refresh circuit supplies second charge current from the second bootstrap node to the first bootstrap node based on the control signal indicating a second operating mode of the DC/DC converter.
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公开(公告)号：US10014774B2
公开(公告)日：2018-07-03
申请号：US15296839
申请日：2016-10-18
发明人： Gangqiang Zhang , Vaibhav Garg , Xiaochun Zhao , Angelo W. D. Pereira , Vijayalakshmi Devarajan
CPC分类号： H02M3/158 , H02M1/08 , H02M2001/0009 , H02M2001/0032 , H02M2003/1566 , Y02B70/16
摘要： One example includes a switching power supply. The switching power supply includes a power stage, a feedback loop, and a simulated feedback error generator. The power stage provides an output signal in response to a switching signal. The feedback loop monitors the output signal and provides a feedback error signal to adjust the switching signal to regulate the output signal. The simulated feedback error generator temporarily provides a simulated feedback error signal during a transition period from the low power mode to a high power mode of the switching power supply until the feedback loop has enough time to provide the feedback error signal.
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