公开(公告)号：US20200321779A1

公开(公告)日：2020-10-08

申请号：US16910656

申请日：2020-06-24

Applicant: Texas Instruments Incorporated

Inventor： Alan Erik Segervall ,  Ross Anthony Pimentel ,  Sumantra Seth

IPC: H02H9/04 ,  H01L27/02 ,  H02H1/00

Abstract: As an example, a circuit is provided. The circuit includes an ESD (electrostatic discharge) clamping circuit with a control signal controlling clamping operations of the ESD clamping circuit. The circuit further includes a counter coupled to the control signal of the ESD clamping circuit. The counter produces a set of output signals responsive to the control signal. The circuit also includes a communications interface for coupling to the set of output signals of the counter. The communications interface also couples to communications circuitry external to the circuit.

公开(公告)号：US11152350B2

公开(公告)日：2021-10-19

申请号：US16220793

申请日：2018-12-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mahalingam Nandakumar ,  Alan Erik Segervall ,  Muhammad Yusuf Ali

IPC: H01L27/02 ,  H01L27/06 ,  H01L29/06 ,  H01L27/08 ,  H01L27/092 ,  H01L21/266

Abstract: An electronic device, e.g. integrated circuit, has an n-type region and a p-type region located within a semiconductor substrate, the n-type region and the p-type region each intersecting the substrate surface. A dielectric structure is located directly on the substrate surface. The dielectric structure has first and second laterally opposed sides, with the first side located over the n-type region and the second side located over the p-type region.

公开(公告)号：US11011508B2

公开(公告)日：2021-05-18

申请号：US16220881

申请日：2018-12-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mahalingam Nandakumar ,  Robert Callaghan Taft ,  Alan Erik Segervall ,  Muhammad Yusuf Ali

IPC: H01L27/02 ,  H01L27/06 ,  H01L29/06 ,  H01L27/08 ,  H01L27/092 ,  H01L29/66

Abstract: An electronic device, e.g. an integrated circuit, is formed on a P-type lightly-doped semiconductor substrate having an N-type buried layer. First and second N-wells extend from a surface of the substrate to the buried layer. A first NSD region is located within the first N-well, and a second NSD region is located within the second N-well. A PSD region extends from the substrate surface into the substrate and is located between the first and second NSD regions. A P-type lightly-doped portion of the substrate is located between the N-well and the substrate surface and between the PSD region and the first and second NSD regions.

公开(公告)号：US11296501B2

公开(公告)日：2022-04-05

申请号：US16910656

申请日：2020-06-24

Applicant: Texas Instruments Incorporated

Inventor： Alan Erik Segervall ,  Ross Anthony Pimentel ,  Sumantra Seth

IPC: H02H9/04 ,  H01L27/02 ,  H02H1/00 ,  H01L23/00

Abstract: As an example, a circuit is provided. The circuit includes an ESD (electrostatic discharge) clamping circuit with a control signal controlling clamping operations of the ESD clamping circuit. The circuit further includes a counter coupled to the control signal of the ESD clamping circuit. The counter produces a set of output signals responsive to the control signal. The circuit also includes a communications interface for coupling to the set of output signals of the counter. The communications interface also couples to communications circuitry external to the circuit.

公开(公告)号：US10749337B2

公开(公告)日：2020-08-18

申请号：US15808490

申请日：2017-11-09

Applicant: Texas Instruments Incorporated

Inventor： Alan Erik Segervall ,  Ross Anthony Pimentel ,  Sumantra Seth

IPC: H02H9/04 ,  H01L27/02 ,  H02H1/00 ,  H01L23/00

Abstract: As an example, a circuit is provided. The circuit includes an ESD (electrostatic discharge) clamping circuit with a control signal controlling clamping operations of the ESD clamping circuit. The circuit further includes a counter coupled to the control signal of the ESD clamping circuit. The counter produces a set of output signals responsive to the control signal. The circuit also includes a communications interface for coupling to the set of output signals of the counter. The communications interface also couples to communications circuitry external to the circuit.

公开(公告)号：US20180226792A1

公开(公告)日：2018-08-09

申请号：US15808490

申请日：2017-11-09

Applicant: Texas Instruments Incorporated

Inventor： Alan Erik Segervall ,  Ross Anthony Pimentel ,  Sumantra Seth

IPC: H02H9/04 ,  H01L27/02 ,  H01L23/00 ,  H02H1/00

CPC classification number: H02H9/046 ,  H01L24/05 ,  H01L24/06 ,  H01L27/0248 ,  H01L27/0259 ,  H01L27/0281 ,  H01L2224/06135 ,  H02H1/0007 ,  H02H1/0061 ,  H02H9/044

Abstract: As an example, a circuit is provided. The circuit includes an ESD (electrostatic discharge) clamping circuit with a control signal controlling clamping operations of the ESD clamping circuit. The circuit further includes a counter coupled to the control signal of the ESD clamping circuit. The counter produces a set of output signals responsive to the control signal. The circuit also includes a communications interface for coupling to the set of output signals of the counter. The communications interface also couples to communications circuitry external to the circuit.