INTEGRATED CIRCUIT DEVICES WITH RECEIVER CHAIN PEAK DETECTORS

    公开(公告)号:US20240056047A1

    公开(公告)日:2024-02-15

    申请号:US18487573

    申请日:2023-10-16

    CPC classification number: H03G3/3057

    Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

    INTEGRATED CIRCUIT DEVICES WITH RECEIVER CHAIN PEAK DETECTORS

    公开(公告)号:US20210083639A1

    公开(公告)日:2021-03-18

    申请号:US16575132

    申请日:2019-09-18

    Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

    Integrated circuit devices with receiver chain peak detectors

    公开(公告)号:US11139791B2

    公开(公告)日:2021-10-05

    申请号:US16575132

    申请日:2019-09-18

    Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

    RF peak detector circuit
    4.
    发明授权

    公开(公告)号:US11994548B2

    公开(公告)日:2024-05-28

    申请号:US17512552

    申请日:2021-10-27

    Inventor: Arnab Das

    Abstract: An apparatus comprises a transistor pair including a first metal oxide semiconductor field effect transistor (MOSFET) coupled to a second MOSFET. The first MOSFET includes a first gate terminal and a first drain terminal. The second MOSFET comprises a second gate terminal and a second drain terminal. The first gate terminal is configured to receive a first signal. The second gate terminal is configured to receive a second signal that is phase shifted with respect to the first signal. An output node is coupled to the first drain terminal and the second drain terminal and configured to output a third signal that is proportional to a power of the first signal and the second signal.

    Peak detector
    5.
    发明授权

    公开(公告)号:US11323103B2

    公开(公告)日:2022-05-03

    申请号:US17138145

    申请日:2020-12-30

    Inventor: Arnab Das

    Abstract: A circuit with a differential input configured to receive a differential analog input signal. The circuit also includes a common mode detection circuit, a primary signal circuit coupled, and a replica block. The circuit also includes a summer coupled to the output of the primary signal circuit and to an output of the replica block.

    Low-power dual down-conversion Wi-Fi wake-up receiver

    公开(公告)号:US12096364B2

    公开(公告)日:2024-09-17

    申请号:US17530059

    申请日:2021-11-18

    CPC classification number: H04W52/0229 H03M1/185 H04L5/0007 H04W84/12

    Abstract: A Wi-Fi wake-up receiver that receives wake-up signals encoded using orthogonal frequency division multiplexing based on-off keying (OFDM-OOK) modulation includes receiver circuitry having analog envelope detector circuitry configured to non-linearly down-convert an input signal and provide an energy signal for sampling by an analog-to-digital converter (ADC). A wake-up signal for waking up a main radio in a Wi-Fi device can be based on the digitized energy signal. The receiver circuitry can further include, upstream of the envelope detector circuitry and the ADC in the signal chain, an analog mixer for linearly down-converting the input signal and a low-pass filter for attenuating adjacent-channel interferer (ACI) signals prior to the non-linear down-conversion by the envelope detector circuitry. Sampling of the energy signal rather than the higher-bandwidth input signal yield power savings in the ADC and associated circuitry such as a modem.

    Integrated circuit devices with receiver chain peak detectors

    公开(公告)号:US11824508B2

    公开(公告)日:2023-11-21

    申请号:US17465243

    申请日:2021-09-02

    CPC classification number: H03G3/3057

    Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

    Peak Detector
    8.
    发明申请

    公开(公告)号:US20220109435A1

    公开(公告)日:2022-04-07

    申请号:US17138145

    申请日:2020-12-30

    Inventor: Arnab Das

    Abstract: A circuit with a differential input configured to receive a differential analog input signal. The circuit also includes a common mode detection circuit, a primary signal circuit coupled, and a replica block. The circuit also includes a summer coupled to the output of the primary signal circuit and to an output of the replica block.

    Integrated circuit devices with receiver chain peak detectors

    公开(公告)号:US12063019B2

    公开(公告)日:2024-08-13

    申请号:US18487573

    申请日:2023-10-16

    CPC classification number: H03G3/3057

    Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

    INTEGRATED CIRCUIT DEVICES WITH RECEIVER CHAIN PEAK DETECTORS

    公开(公告)号:US20210399706A1

    公开(公告)日:2021-12-23

    申请号:US17465243

    申请日:2021-09-02

    Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

Patent Agency Ranking