COUNTERMEASURE AGAINST FAULT INJECTION ATTACKS

    公开(公告)号:US20250028831A1

    公开(公告)日:2025-01-23

    申请号:US18882164

    申请日:2024-09-11

    Abstract: A method includes programming first and second values and a first compare enable command into respective first operand, second operand, and first compare enable command registers in a hardware comparator circuit. The method includes determining that a first match exists corresponding to the first and second values, programming a third value into the first operand register and a fourth value into the second operand register, and programming a second compare enable command into a second compare enable command register in the hardware comparator circuit. In response to a determination that a second match exists corresponding to the third and fourth values, the method includes asserting a success interrupt signal, programming a fifth value into the first operand register and a sixth value into the second operand register and programming a second compare enable command into a second compare enable command register in the hardware comparator circuit.

    COUNTERMEASURE AGAINST FAULT INJECTION ATTACKS

    公开(公告)号:US20230214490A1

    公开(公告)日:2023-07-06

    申请号:US17853612

    申请日:2022-06-29

    CPC classification number: G06F21/566 G06F21/52 G06F2221/034

    Abstract: A method includes programming first and second values and a first compare enable command into respective first operand, second operand, and first compare enable command registers in a hardware comparator circuit. The method includes determining that a first match exists corresponding to the first and second values, programming a third value into the first operand register and a fourth value into the second operand register, and programming a second compare enable command into a second compare enable command register in the hardware comparator circuit. In response to a determination that a second match exists corresponding to the third and fourth values, the method includes asserting a success interrupt signal, programming a fifth value into the first operand register and a sixth value into the second operand register and programming a second compare enable command into a second compare enable command register in the hardware comparator circuit.

    EXTERNAL MEMORY DATA INTEGRITY VALIDATION
    3.
    发明公开

    公开(公告)号:US20240086081A1

    公开(公告)日:2024-03-14

    申请号:US18514547

    申请日:2023-11-20

    CPC classification number: G06F3/0619 G06F3/0655

    Abstract: In some examples, a method includes determining, during a boot sequence of a controller, a hash value for data of a block of a flash storage device, the block including executable code, determining a bit pattern based on a randomly generated number, extracting a subset of data bits of the hash value according to the bit pattern to obtain a snippet, and storing the snippet to a secure storage device.

    STACK MEMORY ALLOCATION CONTROL BASED ON MONITORED ACTIVITIES

    公开(公告)号:US20220291962A1

    公开(公告)日:2022-09-15

    申请号:US17197746

    申请日:2021-03-10

    Abstract: An integrated circuit includes: a processor; a memory coupled to the processor; and a stack memory allocation controller coupled to the processor and the memory. The stack memory allocation controller has: a stack use manager configured to monitor activities of the processor. The stack memory allocation controller also has a virtual memory translator configured to: obtain a first mapping of pointers to a first sub-set of memory blocks of the memory assigned to a memory stack for a thread executed by the processor; and determine a second mapping of pointers to a second sub-set of memory blocks of the memory assigned to the memory stack and different than the first sub-set of memory blocks responsive to the monitored activities.

    TECHNIQUE FOR AUTHENTICATION AND PREREQUISITE CHECKS FOR SOFTWARE UPDATES

    公开(公告)号:US20210019418A1

    公开(公告)日:2021-01-21

    申请号:US16515918

    申请日:2019-07-18

    Abstract: Techniques related to a technique comprising dividing an update into a number of portions, generating, for the first portion, a first portion hash value, generating, for the second portion, a second portion hash value, generating a first branch hash value comprising a hash of a concatenation of the first portion hash value and the second portion hash value, generating a root hash value by concatenating the first branch hash value and a second branch hash value, generating a signature based on the root hash value and a private key, generating an update header comprising the signature, the root hash value, and a hash tree comprising first and second portion hash values, the first branch hash value, and the root hash value, transmitting the update header to a client device for authentication, and transmitting one or more of the number of portions to the client device.

    EXTERNAL MEMORY DATA INTEGRITY VALIDATION
    7.
    发明公开

    公开(公告)号:US20230152980A1

    公开(公告)日:2023-05-18

    申请号:US17527865

    申请日:2021-11-16

    CPC classification number: G06F3/0619 G06F3/0655

    Abstract: In some examples, a method includes determining, during a boot sequence of a controller, a hash value for data of a block of a flash storage device, the block including executable code, determining a bit pattern based on a randomly generated number, extracting a subset of data bits of the hash value according to the bit pattern to obtain a snippet, and storing the snippet to a secure storage device.

    EXTERNAL MEMORY DATA INTEGRITY VALIDATION

    公开(公告)号:US20250117141A1

    公开(公告)日:2025-04-10

    申请号:US18989032

    申请日:2024-12-20

    Abstract: In some examples, a method includes determining, during a boot sequence of a controller, a hash value for data of a block of a flash storage device, the block including executable code, determining a bit pattern based on a randomly generated number, extracting a subset of data bits of the hash value according to the bit pattern to obtain a snippet, and storing the snippet to a secure storage device.

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