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公开(公告)号：US09746862B2
公开(公告)日：2017-08-29
申请号：US14958586
申请日：2015-12-03
Applicant: Texas Instruments Incorporated
Inventor： Dinesh Jain
IPC: G05F1/46
CPC classification number: G05F1/461
Abstract: A voltage-to-current converter includes an input stage having a first input and a second input. The first input is connectable to a reference voltage, wherein the voltage of the second input is substantially the same as the voltage at the first input. A feedback loop is coupled between the second input and a voltage feedback node. A current feedback node is connectable to a first node of a resistor; the second node of the resistor is connectable to a voltage input, wherein a bias voltage of the current feedback node is set by the voltage of the voltage feedback node. At least one current mirror mirrors the current input to the current feedback node, the output of the at least one current mirror is the output of the voltage-to-current converter.
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公开(公告)号：US20170160755A1
公开(公告)日：2017-06-08
申请号：US14958586
申请日：2015-12-03
Applicant: Texas Instruments Incorporated
Inventor： Dinesh Jain
IPC: G05F1/46
CPC classification number: G05F1/461
Abstract: A voltage-to-current converter includes an input stage having a first input and a second input. The first input is connectable to a reference voltage, wherein the voltage of the second input is substantially the same as the voltage at the first input. A feedback loop is coupled between the second input and a voltage feedback node. A current feedback node is connectable to a first node of a resistor; the second node of the resistor is connectable to a voltage input, wherein a bias voltage of the current feedback node is set by the voltage of the voltage feedback node. At least one current mirror mirrors the current input to the current feedback node, the output of the at least one current mirror is the output of the voltage-to-current converter.
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公开(公告)号：US09444481B1
公开(公告)日：2016-09-13
申请号：US14886875
申请日：2015-10-19
Applicant: Texas Instruments Incorporated
Inventor： Dinesh Jain
CPC classification number: H03M1/1009 , H03M1/12 , H03M1/1245 , H03M1/34 , H03M1/56
Abstract: An analog to digital converter includes an analog input and a voltage comparator coupled to the analog input for comparing a voltage at the analog input to a digitally synthesized waveform. A digital to analog converter (DAC) generates the digitally synthesized waveform. The DAC includes a plurality of capacitors selectively connected in parallel wherein the period between the selection of capacitors is less than the settling time of the voltage across the capacitors.
Abstract translation: 模数转换器包括模拟输入和耦合到模拟输入的电压比较器，用于将模拟输入端的电压与数字合成波形进行比较。 数模转换器（DAC）产生数字合成波形。 DAC包括选择性地并联连接的多个电容器，其中电容器选择之间的周期小于电容器两端的电压的稳定时间。
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公开(公告)号：US10425091B2
公开(公告)日：2019-09-24
申请号：US16151752
申请日：2018-10-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Dinesh Jain , Markus Friedrich Dietl
Abstract: A full quadrant analog interpolator used in a fractional clock generator. A quadrature clock signal with minimal jitter is provided to the full quadrant analog interpolator. The full quadrant analog interpolator uses a series of switches and current sources to develop a differential output signal based on a digital input value, thus allowing digital control of the delay developed by the full quadrant analog interpolator. The differential output of the full quadrant analog interpolator is provided to multi-stage comparator. The output of the multi-stage comparator is provided to an integer divider to provide the final output clock. A digital control section utilizes a ΣΔ modulator and a summer to utilize an input N.α control input which provides the desired fractional division amount to provide a signal to a phase accumulator. The output of the phase accumulator is the digital control or β value of the full quadrant analog interpolator.
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公开(公告)号：US10095252B2
公开(公告)日：2018-10-09
申请号：US15658620
申请日：2017-07-25
Applicant: Texas Instruments Incorporated
Inventor： Dinesh Jain
IPC: G05F1/46
Abstract: A voltage-to-current converter includes an input stage having a first input and a second input. The first input is connectable to a reference voltage, wherein the voltage of the second input is substantially the same as the voltage at the first input. A feedback loop is coupled between the second input and a voltage feedback node. A current feedback node is connectable to a first node of a resistor; the second node of the resistor is connectable to a voltage input, wherein a bias voltage of the current feedback node is set by the voltage of the voltage feedback node. At least one current mirror mirrors the current input to the current feedback node, the output of the at least one current mirror is the output of the voltage-to-current converter.
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Patent Agency Ranking
公开(公告)号：US20170346472A1
公开(公告)日：2017-11-30
申请号：US15164283
申请日：2016-05-25
Applicant: Texas Instruments Incorporated
Inventor： Dinesh Jain
Abstract: A comparator includes an input stage having a differential input and an output, wherein the voltage at the output is in response to the voltage at the input. The comparator further includes a current limiter for limiting the current flow through the input stage, wherein the current flow through the input stage is in response to the voltage at the input.
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公开(公告)号：US11463077B2
公开(公告)日：2022-10-04
申请号：US15164283
申请日：2016-05-25
Applicant: Texas Instruments Incorporated
Inventor： Dinesh Jain
Abstract: A comparator includes an input stage having a differential input and an output, wherein the voltage at the output is in response to the voltage at the input. The comparator further includes a current limiter for limiting the current flow through the input stage, wherein the current flow through the input stage is in response to the voltage at the input.
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公开(公告)号：US20170322574A1
公开(公告)日：2017-11-09
申请号：US15658620
申请日：2017-07-25
Applicant: Texas Instruments Incorporated
Inventor： Dinesh Jain
IPC: G05F1/46
CPC classification number: G05F1/461
Abstract: A voltage-to-current converter includes an input stage having a first input and a second input. The first input is connectable to a reference voltage, wherein the voltage of the second input is substantially the same as the voltage at the first input. A feedback loop is coupled between the second input and a voltage feedback node. A current feedback node is connectable to a first node of a resistor; the second node of the resistor is connectable to a voltage input, wherein a bias voltage of the current feedback node is set by the voltage of the voltage feedback node. At least one current mirror mirrors the current input to the current feedback node, the output of the at least one current mirror is the output of the voltage-to-current converter.
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公开(公告)号：US09692434B2
公开(公告)日：2017-06-27
申请号：US15235477
申请日：2016-08-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Dinesh Jain
CPC classification number: H03M1/1009 , H03M1/12 , H03M1/1245 , H03M1/34 , H03M1/56
Abstract: An analog to digital converter includes an analog input and a voltage comparator coupled to the analog input for comparing a voltage at the analog input to a digitally synthesized waveform. A digital to analog converter (DAC) generates the digitally synthesized waveform. The DAC includes a plurality of capacitors selectively connected in parallel wherein the period between the selection of capacitors is less than the settling time of the voltage across the capacitors.
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公开(公告)号：US09397693B1
公开(公告)日：2016-07-19
申请号：US14926320
申请日：2015-10-29
Applicant: Texas Instruments Incorporated
Inventor： Dinesh Jain
Abstract: An asynchronous analog-to-digital converter (AADC) and a method of using the AADC are shown. The AADC includes a digital-to analog-converter (DAC), a continuous-time comparator that provides an output including a digital value of the DAC and a time value, and a first and a second continuous-time summer, each connected to receive an analog differential input on a first input, to receive a differential output of the DAC on a second input, and to provide a difference between the analog input and the output of the DAC to the continuous-time comparator and to an error estimator. The continuous-time comparator provides the output responsive to the difference between the analog input and the output of the DAC being zero.
Abstract translation: 示出了异步模数转换器（AADC）和使用AADC的方法。 AADC包括数模转换器（DAC），连续时间比较器，其提供包括DAC的数字值和时间值的输出以及连续接收的第一和第二连续时间夏季 在第一输入上的模拟差分输入，用于在第二输入端接收DAC的差分输出，并且将DAC的模拟输入和输出之间的差值提供给连续时间比较器和误差估计器。 连续时间比较器提供响应于DAC的模拟输入和输出之间的差为零的输出。
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