公开(公告)号：US20230236247A1

公开(公告)日：2023-07-27

申请号：US17974968

申请日：2022-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： MD Abidur RAHMAN ,  Eung Jung KIM ,  Wenchao QU

IPC: G01R31/327 ,  G01R19/165 ,  G01R19/10 ,  H03K17/687

CPC classification number: G01R31/327 ,  G01R19/16571 ,  G01R19/10 ,  H03K17/6871 ,  H03K2217/0063

Abstract: In an example, a system includes a first power stage including a first power field effect transistor (FET) and a first sense transistor coupled to the first power FET. The system also includes a second power stage including a second power FET and a second sense transistor coupled to the second power FET, where the second power stage is smaller than the first power stage. The system includes a first switch coupled to a gate and a drain of the first power FET and a second switch coupled to the first power stage and the second power stage. The system also includes a sense amplifier coupled to the second switch, where the first power stage, the second power stage, and the sense amplifier are coupled to a load terminal.

公开(公告)号：US20190204361A1

公开(公告)日：2019-07-04

申请号：US15859470

申请日：2017-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tikno HARJONO ,  Vijay KRISHNAMURTHY ,  Min CHU ,  Kuntal JOARDAR ,  Gary Eugene DAUM ,  Subrato ROY ,  Vinayak HEGDE ,  Ankur CHAUHAN ,  Sathish VALLAMKONDA ,  Md Abidur RAHMAN ,  Eung Jung KIM

IPC: G01R15/14 ,  H01L27/06 ,  H01L49/02 ,  H01L25/18 ,  H03K17/567

CPC classification number: G01R15/146 ,  H01L25/18 ,  H01L27/0629 ,  H01L28/20 ,  H03K17/567

Abstract: An electronic device comprises: a first semiconductor die; a power transistor integrated in the first semiconductor die, the power transistor comprising a gate, a first terminal, and a second terminal; a sense transistor integrated in the first semiconductor die, the sense transistor comprising a gate coupled to the gate of the power transistor, a first terminal, and a second terminal coupled to the second terminal of the power transistor; and a first resistor integrated in the first semiconductor die, the first resistor comprising a polysilicon section and a metal section coupled to the polysilicon section, the first resistor comprising a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the first terminal of the sense transistor.

公开(公告)号：US20240006869A1

公开(公告)日：2024-01-04

申请号：US18469109

申请日：2023-09-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eung Jung KIM ,  Wenchao QU

IPC: H02H3/08 ,  H02H1/06

CPC classification number: H02H3/08 ,  H02H1/06

Abstract: In some examples, this description provides for an apparatus. The apparatus includes a power switch having a power switch source configured to receive an input voltage, a power switch drain, and a power switch gate. The apparatus also includes a current sense component coupled to the power switch. The apparatus also includes a current limiting circuit coupled to the power switch gate, the power switch drain, and the current sense component. The apparatus also includes an over-current protection (OCP) circuit coupled to the power switch source, the power switch drain, and the power switch gate. The apparatus also includes an output voltage (VOUT) clamp coupled to the power switch drain and the power switch gate.

公开(公告)号：US20220360068A1

公开(公告)日：2022-11-10

申请号：US17514774

申请日：2021-10-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eung Jung KIM ,  Wenchao QU

IPC: H02H3/08 ,  H02H1/06

Abstract: In some examples, this description provides for an apparatus. The apparatus includes a power switch having a power switch source configured to receive an input voltage, a power switch drain, and a power switch gate. The apparatus also includes a current sense component coupled to the power switch. The apparatus also includes a current limiting circuit coupled to the power switch gate, the power switch drain, and the current sense component. The apparatus also includes an over-current protection (OCP) circuit coupled to the power switch source, the power switch drain, and the power switch gate. The apparatus also includes an output voltage (VOUT) clamp coupled to the power switch drain and the power switch gate.