公开(公告)号：US20230221742A1

公开(公告)日：2023-07-13

申请号：US18090861

申请日：2022-12-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Vinayak HEGDE ,  Rolly BARADIYA ,  Ankur CHAUHAN

IPC: G05F1/56 ,  G05F3/26 ,  G05F1/46

CPC classification number: G05F1/561 ,  G05F3/262 ,  G05F1/468

Abstract: In examples, an apparatus includes a FET, first and second voltage-to-current circuits, a current selection circuit, and a comparator. The FET has first and second segments. The first segment has a first gate coupled to the first voltage-to-current circuit, a first source, and a first drain. The second segment has a second gate coupled to the second voltage-to-current circuit, a second source coupled to the first source, and a second drain coupled to the first drain. The current selection circuit has a current selection circuit output and first and second current selection inputs. The first current selection circuit input is coupled to the first voltage-to-current circuit. The second current selection circuit input is coupled to the second voltage-to-current circuit. The comparator has a comparator output and first and second comparator inputs, the first comparator input is coupled to the current selection circuit output.

公开(公告)号：US20180262199A1

公开(公告)日：2018-09-13

申请号：US15873758

申请日：2018-01-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ankur CHAUHAN ,  Abhrarup BARMAN ROY

IPC: H03L7/183 ,  H03K5/1252 ,  H03K5/24 ,  H03K17/041 ,  H03K17/62 ,  H03K17/693 ,  H03K19/0185 ,  H03M1/74 ,  H03M1/46

CPC classification number: H03L7/183 ,  H03K5/1252 ,  H03K5/24 ,  H03K17/04106 ,  H03K17/62 ,  H03K17/693 ,  H03K19/0185 ,  H03M1/46 ,  H03M1/747

Abstract: In some examples, a device comprises a first driver coupled to a first node, the first node to couple to a first load external to the device. The device comprises a second driver coupled to a second node, the second node coupled to a second load internal to the device. The device comprises a comparison circuit having an inverting input coupled to the first node and a non-inverting input coupled to the second node. Sizes of the second driver and the second load are configured proportionately to sizes of the first driver and the first load, respectively.

公开(公告)号：US20240146254A1

公开(公告)日：2024-05-02

申请号：US18050338

申请日：2022-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ankur CHAUHAN ,  Orlando LAZARO ,  Kushal MURTHY ,  Andres BLANCO ,  Henry EDWARDS

IPC: H03F1/30 ,  H01L27/02

CPC classification number: H03F1/308 ,  H01L27/0211

Abstract: A power transistor includes an ambient temperature input, a local temperature sensor, an array of transistor cells, and a thermal feedback circuit. The ambient temperature input is configured to receive an ambient temperature signal that is representative of an ambient temperature of the power transistor. The array of transistor cells has a control input. The local temperature sensor is configured to provide a local temperature signal that is representative of a temperature of the array of transistor cells. The thermal feedback circuit is coupled to the ambient temperature input, the local temperature sensor, and the control input. The thermal feedback circuit is configured to modulate a control signal provided at the control input based on a difference between the ambient temperature signal and the local temperature signal.

公开(公告)号：US20190204361A1

公开(公告)日：2019-07-04

申请号：US15859470

申请日：2017-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tikno HARJONO ,  Vijay KRISHNAMURTHY ,  Min CHU ,  Kuntal JOARDAR ,  Gary Eugene DAUM ,  Subrato ROY ,  Vinayak HEGDE ,  Ankur CHAUHAN ,  Sathish VALLAMKONDA ,  Md Abidur RAHMAN ,  Eung Jung KIM

IPC: G01R15/14 ,  H01L27/06 ,  H01L49/02 ,  H01L25/18 ,  H03K17/567

CPC classification number: G01R15/146 ,  H01L25/18 ,  H01L27/0629 ,  H01L28/20 ,  H03K17/567

Abstract: An electronic device comprises: a first semiconductor die; a power transistor integrated in the first semiconductor die, the power transistor comprising a gate, a first terminal, and a second terminal; a sense transistor integrated in the first semiconductor die, the sense transistor comprising a gate coupled to the gate of the power transistor, a first terminal, and a second terminal coupled to the second terminal of the power transistor; and a first resistor integrated in the first semiconductor die, the first resistor comprising a polysilicon section and a metal section coupled to the polysilicon section, the first resistor comprising a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the first terminal of the sense transistor.

公开(公告)号：US20180262184A1

公开(公告)日：2018-09-13

申请号：US15857135

申请日：2017-12-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ankur CHAUHAN ,  Subrato ROY

IPC: H03K5/08

CPC classification number: H03K5/086 ,  G05F1/46 ,  G05F1/573

Abstract: An example current limiting apparatus comprises a first transistor to carry a first current; a sense transistor coupled to the first transistor, the sense transistor to carry a sense current that is a function of the first current; a first amplifier coupled to the first transistor and the sense transistor, the amplifier to achieve a common voltage potential on terminals of the first and the sense transistors; a second amplifier coupled to the first amplifier and the sense transistor, the second amplifier to control the first and sense transistors based on the sense current; and a circuit coupled to the first and second amplifiers, the circuit to control an input to the second amplifier based on an input to the first amplifier such that a current limit of the first transistor remains below a programmed current limit of the first transistor.

公开(公告)号：US20200043849A1

公开(公告)日：2020-02-06

申请号：US16050383

申请日：2018-07-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kuntal JOARDAR ,  Min CHU ,  Vijay KRISHNAMURTHY ,  Tikno HARJONO ,  Ankur CHAUHAN ,  Vinayak HEGDE ,  Manish SRIVASTAVA

IPC: H01L23/525 ,  H01L27/112 ,  G11C17/16

Abstract: An electronic device comprises a first semiconductor die; a power transistor integrated in the first semiconductor die, the power transistor comprising a first gate, a first terminal, and a second terminal; a first sense transistor integrated in the first semiconductor die, the first sense transistor comprising a second gate and third and fourth terminals, the second gate coupled to the first gate and the fourth terminal coupled to the second terminal; a first resistor integrated in the first semiconductor die, the first resistor has a first temperature coefficient; a second sense transistor integrated in the first semiconductor die, the second sense transistor comprising a third gate and seventh and eighth terminals, the third gate coupled to the first gate and the eighth terminal coupled to the second terminal; and a second resistor integrated in the first semiconductor die, the second resistor has a second temperature coefficient.