公开(公告)号：US20180204767A1

公开(公告)日：2018-07-19

申请号：US15658039

申请日：2017-07-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sebastian MEIER ,  Helmut RINCK ,  Kai-Alexander SCHACHTSCHNEIDER ,  Fromund METZ ,  Mario SCHMIDPETER ,  Javier Gustavo MOREIRA

IPC: H01L21/768 ,  H01L21/285 ,  H01L21/311 ,  H01L21/3213

CPC classification number: H01L21/76865 ,  H01L21/2855 ,  H01L21/31111 ,  H01L21/32139

Abstract: In accordance with at least one embodiment of the disclosure, a method of patterning platinum on a substrate is disclosed. In an embodiment, an adhesive layer is deposited over the substrate, a sacrificial layer is deposited over the adhesive layer, and a patterned photoresist layer is formed over the sacrificial layer. Then, the sacrificial layer is patterned utilizing the photoresist layer as a mask such that at least a portion of the adhesive layer is exposed. Subsequently, the top and sidewall surfaces of the patterned sacrificial layer and the first portion of the adhesive layer are covered by a platinum layer. Finally, the sacrificial layer and a portion of the platinum layer covering the top and sidewall surfaces of the sacrificial layer are etched, thereby leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate.

公开(公告)号：US20230187390A1

公开(公告)日：2023-06-15

申请号：US17957352

申请日：2022-09-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sebastian MEIER ,  Bernhard ZIEGLTRUM ,  Helmut RINCK

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/32 ,  H01L24/16 ,  H01L24/73 ,  H01L24/08 ,  H01L2224/73204 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16257 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/05657 ,  H01L2224/05111 ,  H01L2224/05169 ,  H01L2224/05541 ,  H01L2224/08502 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2924/1461

Abstract: In one example, a semiconductor die comprises: a semiconductor substrate having a circuit formed therein; one or more metal layers on the semiconductor substrate, the one or more metal layers coupled to the circuit; a metal interface structure on the one or more metal layers, in which the metal interface structure has opposite first and second surfaces, and the first surface faces the one or more metal layers; and a dissolvable metal layer on the second surface.