公开(公告)号：US20190206828A1

公开(公告)日：2019-07-04

申请号：US16025603

申请日：2018-07-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Honglin GUO ,  Jason CHIEN ,  Byron Lovell WILLIAMS ,  Jeffrey Alan WEST ,  Anderson LI ,  Arvin Nono VERDEFLOR

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/495 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L24/49 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/85 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49505 ,  H01L2224/85013 ,  H01L2224/85913 ,  H01L2924/1205

Abstract: An integrated circuit package and methods for packaging an integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first die and the palladium coated copper wires. The first die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.

公开(公告)号：US20240332243A1

公开(公告)日：2024-10-03

申请号：US18740456

申请日：2024-06-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mahmud Halim CHOWDHURY ,  Amin SIJELMASSI ,  Murali KITTAPPA ,  Anindya PODDAR ,  Honglin GUO ,  Joe Adam GARCIA ,  John Paul TELLKAMP

IPC: H01L23/00 ,  H01H85/02 ,  H01L23/495 ,  H01L23/498

CPC classification number: H01L24/48 ,  H01H85/0241 ,  H01L24/49 ,  H01L24/85 ,  H01H2085/0283 ,  H01L23/49555 ,  H01L23/49827 ,  H01L24/73 ,  H01L2224/4801 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48455 ,  H01L2224/4846 ,  H01L2224/48479 ,  H01L2224/48499 ,  H01L2224/49111 ,  H01L2224/494 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/8534 ,  H01L2924/01013 ,  H01L2924/01079 ,  H01L2924/2064 ,  H01L2924/2075

Abstract: In examples, a package comprises a semiconductor die having a device side and a bond pad on the device side, a conductive terminal exposed to an exterior of the package, and an electrical fuse. The electrical fuse comprises a conductive ball coupled to the bond pad, and a bond wire coupled to the conductive terminal. The bond wire is stitch-bonded to the conductive ball.

公开(公告)号：US20200096574A1

公开(公告)日：2020-03-26

申请号：US16137146

申请日：2018-09-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Xiong LI ,  William TOTH ,  Honglin GUO ,  Danyang ZHU

IPC: G01R31/40 ,  H03K19/20 ,  H02H1/00 ,  H02H3/20 ,  H03K5/24 ,  G01R31/26

Abstract: A device that comprises a first semiconductor die and a second semiconductor die. The first semiconductor die comprises a first clock signal generator. The second semiconductor die comprises a fault detection circuit, the fault detection circuit comprising a second clock signal generator, a first counter coupled to the second clock signal generator, multiple storage devices coupled to the second clock signal generator and to the first counter, a logic gate coupled to the multiple storage devices, a second counter coupled to the logic gate and to the first clock signal generator, and a comparator coupled to the logic gate and the second counter.

公开(公告)号：US20200251440A1

公开(公告)日：2020-08-06

申请号：US16854823

申请日：2020-04-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Honglin GUO ,  Jason CHIEN ,  Byron Lovell WILLIAMS ,  Jeffrey Alan WEST ,  Anderson LI ,  Arvin Nono VERDEFLOR

IPC: H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56

Abstract: An integrated circuit and methods for packaging the integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first integrated circuit die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first integrated circuit die and the palladium coated copper wires. The first integrated circuit die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.

公开(公告)号：US20230036643A1

公开(公告)日：2023-02-02

申请号：US17390823

申请日：2021-07-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mahmud Halim CHOWDHURY ,  Amin SIJELMASSI ,  Murali KITTAPPA ,  Anindya PODDAR ,  Honglin GUO ,  Joe Adam GARCIA ,  John Paul TELLKAMP

IPC: H01L23/00 ,  H01H85/02

Abstract: In examples, a package comprises a semiconductor die having a device side and a bond pad on the device side, a conductive terminal exposed to an exterior of the package, and an electrical fuse. The electrical fuse comprises a conductive ball coupled to the bond pad, and a bond wire coupled to the conductive terminal. The bond wire is stitch-bonded to the conductive ball.

公开(公告)号：US20200381358A1

公开(公告)日：2020-12-03

申请号：US16995288

申请日：2020-08-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Qi-Zhong HONG ,  Honglin GUO ,  Benjamin James Timmer ,  Gregory Boyd SHINN

IPC: H01L23/522 ,  H01L49/02

Abstract: An integrated circuit (IC) includes a substrate having a semiconductor surface layer with functional circuitry for realizing at least one circuit function, with an inter level dielectric (ILD) layer on a metal layer that is above the semiconductor surface layer. A thin film resistor (TFR) including a TFR layer is on the ILD layer. At least one vertical metal wall is on at least two sides of the TFR. The metal walls include at least 2 metal levels coupled by filled vias. The functional circuitry is outside the metal walls.