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    Phase-locked loop (PLL) circuit
    1.
    发明授权
    Phase-locked loop (PLL) circuit 有权

    公开(公告)号：US10200048B2

    公开(公告)日：2019-02-05

    申请号：US15346248

    申请日：2016-11-08

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Erhan Ozalevli ,  Mustapha El Markhi ,  Tuli Dake

    IPC: H03L7/06 ,  H03L7/099 ,  H03L7/085 ,  H03L7/113 ,  H03K3/0231

    Abstract: One example includes a phase-locked loop (PLL) circuit. The circuit includes a frequency divider and phase detector configured to generate a plurality of non-overlapping switching signals based on an input signal and a PLL output signal. The circuit also includes a linear frequency-to-current (F2I) converter configured to generate a control current having an amplitude that is based on the plurality of non-overlapping switching signals. The circuit further includes a linear current-controlled oscillator configured to generate the PLL output signal to have a frequency and phase to be approximately equal to the input signal based on the amplitude of the control current.

    Battery charging and measurement circuit
    2.
    发明授权
    Battery charging and measurement circuit 有权

    公开(公告)号：US10938403B2

    公开(公告)日：2021-03-02

    申请号：US16191225

    申请日：2018-11-14

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Mustapha El Markhi ,  Erhan Ozalevli ,  Tuli Dake ,  Rohit Bhan

    IPC: H02J7/00 ,  H02J7/14 ,  H03M1/66

    Abstract: An example device comprises a digital-to-analog converter (DAC) comprising first and second transistors coupled to a first amplifier, the second transistor coupled to a first output of the DAC and to an output of the first amplifier, and third and fourth transistors coupled to the first amplifier and to a second output of the DAC, the third and fourth transistors switchably coupled to a voltage supply and to the first transistor. The device also comprises a first node coupled to the first output of the DAC and to a resistor. The device further includes a second node coupled to the second output of the DAC, and a second amplifier coupled to the second node and to the first transistor and switchably coupled to the third and fourth transistors. The device also comprises a comparator coupled to the first node.

    Driver discharge circuit
    4.
    发明授权
    Driver discharge circuit 有权

    公开(公告)号：US12155376B2

    公开(公告)日：2024-11-26

    申请号：US18165503

    申请日：2023-02-07

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Tuli Dake

    IPC: H03K17/08 ,  H03K17/0812 ,  H02M1/08

    Abstract: A driver includes first and second switches. A first transistor has a first control input and first and second current terminals. A resistor couples between a voltage supply terminal and the first control input. A configurable voltage clamp circuit has a voltage clamp control input and a voltage clamp circuit output coupled to the first control input. A second transistor has a second control input and third and fourth current terminals. A logic circuit includes a comparator having a comparator output. The logic circuit couples to the voltage supply terminal and the voltage clamp control input. The logic circuit is configured to configure the voltage clamp circuit for a first clamp voltage at the voltage clamp circuit output responsive to the first switch being turned ON and for a second clamp voltage at the voltage clamp circuit output based on a signal at the comparator output.

    RESONANT RECTIFIER CIRCUIT WITH CAPACITOR SENSING
    5.
    发明申请
    RESONANT RECTIFIER CIRCUIT WITH CAPACITOR SENSING 审中-公开

    公开(公告)号：US20190386575A1

    公开(公告)日：2019-12-19

    申请号：US16554095

    申请日：2019-08-28

    Applicant: Texas Instruments Incorporated

    Inventor： Mustapha El Markhi ,  Erhan Ozalevli ,  Tuli Dake ,  Dingkun Du ,  Gianpaolo Lisi ,  Jingwei Xu

    IPC: H02M3/335

    Abstract: A wireless power transfer system using a resonant rectifier circuit with capacitor sensing. A wireless power transfer system includes a power receiver resonant circuit and a synchronous rectifier. The power receiver resonant circuit includes an inductor and a capacitor connected in series with the inductor. The synchronous rectifier is configured to identify zero crossings of alternating current flowing through the inductor based on voltage across the capacitor, and control synchronous rectification of the alternating current based on timing of the zero crossings.

    DRIVER WITH ADAPTIVE DRIVE STRENGTH
    7.
    发明申请
    DRIVER WITH ADAPTIVE DRIVE STRENGTH 有权

    公开(公告)号：US20240396542A1

    公开(公告)日：2024-11-28

    申请号：US18323987

    申请日：2023-05-25

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Tuli Dake

    IPC: H03K17/0812 ,  H03K3/017 ,  H03K3/3565 ,  H03K19/0944

    Abstract: A driver includes a first pre-driver having a first drive strength programming input and a first output, a first transistor having a first transistor control input coupled to the first output, and a second pre-driver having a second drive strength programming input and a second output. The driver also includes a second transistor having a second transistor control input coupled to the second output. The second transistor is coupled to the first transistor and to a driver output terminal. A circuit is coupled between the driver output terminal and the first drive strength programming input and between the driver output terminal and the second drive strength programming input.

    DRIVER DISCHARGE CIRCUIT
    8.
    发明公开
    DRIVER DISCHARGE CIRCUIT 审中-公开

    公开(公告)号：US20240204765A1

    公开(公告)日：2024-06-20

    申请号：US18165503

    申请日：2023-02-07

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Tuli Dake

    IPC: H03K17/0812

    CPC classification number: H03K17/08122 ,  H02M1/08

    Abstract: A driver includes first and second switches. A first transistor has a first control input and first and second current terminals. A resistor couples between a voltage supply terminal and the first control input. A configurable voltage clamp circuit has a voltage clamp control input and a voltage clamp circuit output coupled to the first control input. A second transistor has a second control input and third and fourth current terminals. A logic circuit includes a comparator having a comparator output. The logic circuit couples to the voltage supply terminal and the voltage clamp control input. The logic circuit is configured to configure the voltage clamp circuit for a first clamp voltage at the voltage clamp circuit output responsive to the first switch being turned ON and for a second clamp voltage at the voltage clamp circuit output based on a signal at the comparator output.

    Battery charging and measurement circuit
    9.
    发明授权
    Battery charging and measurement circuit 有权

    公开(公告)号：US11646594B2

    公开(公告)日：2023-05-09

    申请号：US17156909

    申请日：2021-01-25

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Mustapha El Markhi ,  Erhan Ozalevli ,  Tuli Dake ,  Rohit Bhan

    IPC: H02J7/00 ,  H02J7/14 ,  H03M1/66

    CPC classification number: H02J7/00714 ,  H03M1/66

    Abstract: An example device comprises a digital-to-analog converter (DAC) comprising first and second transistors coupled to a first amplifier, the second transistor coupled to a first output of the DAC and to an output of the first amplifier, and third and fourth transistors coupled to the first amplifier and to a second output of the DAC, the third and fourth transistors switchably coupled to a voltage supply and to the first transistor. The device also comprises a first node coupled to the first output of the DAC and to a resistor. The device further includes a second node coupled to the second output of the DAC, and a second amplifier coupled to the second node and to the first transistor and switchably coupled to the third and fourth transistors. The device also comprises a comparator coupled to the first node.

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