公开(公告)号：US10903743B2

公开(公告)日：2021-01-26

申请号：US16399576

申请日：2019-04-30

Applicant: Texas Instruments Incorporated

Inventor： Brian Thomas Lynch ,  Stefan Wlodzimierz Wiktor ,  Joseph Maurice Khayat

IPC: H02M3/156 ,  H02M1/08 ,  H02H9/04 ,  H02M3/157 ,  H02M1/00

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to adjust a transient response. An example apparatus includes a clamping circuit including a first input, a second input, a third input, and an output, wherein the first input is adapted to be coupled to a selector, a reference voltage generator including an output, wherein the output of the reference voltage generator is coupled to the second input of the clamping circuit, an error amplifying circuit including an output, wherein the output of the error amplifying circuit is coupled to the third input of the clamping circuit, and a pulse width modulator including an input, wherein the input of the pulse width modulator is coupled to the output of the clamping circuit.

公开(公告)号：US10727730B2

公开(公告)日：2020-07-28

申请号：US16529227

申请日：2019-08-01

Applicant: Texas Instruments Incorporated

Inventor： Robert Alan Neidorff ,  Joseph Maurice Khayat

IPC: H02M1/08 ,  H02M3/155 ,  H02M1/38 ,  H03K5/151

Abstract: Methods and apparatus to increase efficiency of a power converter using a bias voltage on a low side drive gate are disclosed. An example power converter includes an inductor; a transistor coupled to the inductor; and a driver coupled to a gate of the transistor, the driver to apply (A) a first voltage to the gate to enable the transistor, (B) a second voltage to the gate to disable the transistor, and (C) a third voltage to the gate during a transition between applying the first voltage and the second voltage, the third voltage being between the first voltage and the second voltage.

公开(公告)号：US20160181922A1

公开(公告)日：2016-06-23

申请号：US14581681

申请日：2014-12-23

Applicant: Texas Instruments Incorporated

Inventor： Joseph Maurice Khayat

IPC: H02M3/158

CPC classification number: H02M1/08 ,  H02M3/1584 ,  H02M2001/0009

Abstract: A multiphase DC-to-DC synchronous power converter, which has a number of converter channels that generate a corresponding number of current sense signals, blanks the current sense signals in a first converter channel for periods of time that correspond with the actions of the transistors in a second converter channel, where the actions result in noise spikes across the converter that falsely interfere with current sensing in the first converter channel.

Abstract translation: 具有产生相应数量的电流感测信号的多个转换器通道的多相DC-DC同步电力转换器将第一转换器通道中的电流检测信号空白，以对应于晶体管的动作 在第二转换器通道中，其中的动作导致转换器上的噪声尖峰误差地干扰第一转换器通道中的电流感测。

公开(公告)号：US09306458B2

公开(公告)日：2016-04-05

申请号：US14318307

申请日：2014-06-27

Applicant: Texas Instruments Incorporated

Inventor： Joseph Maurice Khayat ,  Ramanathan Ramani ,  Michael G. Amaro

IPC: H02M3/158

CPC classification number: H02M3/158

Abstract: A power circuit combination includes a series capacitor buck converter including a first half-bridge including a first high side power switch (HSA), first low side power switch (LSA) and a second half-bridge. A transfer capacitor (Ct) is connected in series with HSA and LSA, and between the first and second half-bridges. An adaptive HS driver circuit has an output coupled to a gate of HSA and includes a power supply circuit including a summing circuitry that dynamically outputs a variable power supply level (VGX) based on a fixed voltage and a voltage across Ct, a buffer driver, and a boost capacitor (CA) across the buffer driver. VGX is coupled to a positive terminal of CA. The power supply circuit is configured so that as a voltage across Ct varies, VGX adjusts so that a voltage across CA is changed less than a change in voltage across Ct.

Abstract translation: 电源电路组合包括串联电容器降压转换器，其包括包括第一高侧功率开关（HSA），第一低侧功率开关（LSA）和第二半桥的第一半桥。 传输电容器（Ct）与HSA和LSA以及第一和第二半桥之间串联连接。 自适应HS驱动器电路具有耦合到HSA的栅极的输出，并且包括电源电路，其包括基于固定电压和跨越Ct的电压来动态地输出可变电源电平（VGX）的求和电路，缓冲器驱动器， 和缓冲驱动器上的升压电容（CA）。 VGX耦合到CA的正端子。 电源电路被配置为使得当Ct上的电压变化时，VGX进行调整，使得CA两端的电压变化小于Ct两端的电压变化。

公开(公告)号：US09024600B2

公开(公告)日：2015-05-05

申请号：US13948404

申请日：2013-07-23

Applicant: Texas Instruments Incorporated

Inventor： Stefan Wlodzimierz Wiktor ,  Joseph Maurice Khayat ,  Brian Thomas Lynch

IPC: H02M3/158 ,  H02M3/156 ,  H02M3/157

CPC classification number: H02M3/156 ,  H02M3/157 ,  H02M3/1584

Abstract: Pulse width modulation controller apparatus and techniques are presented for balancing output currents of DC-DC converter stages in a multi-stage DC-DC conversion system in which a reference current is provided according to an input voltage and the value of a connected resistor, and a correction current output signal is generated that represents the difference between an average converter stage load current and the local load current, with the on-time of the PWM output signal being generated by charging a capacitance using a charging current obtained by offsetting the reference current output signal with the correction current output signal.

Abstract translation: 提出了用于平衡多级DC-DC转换系统中的DC-DC转换器级的输出电流的脉冲宽度调制控制器装置和技术，其中根据输入电压和连接的电阻器的值提供参考电流，以及 产生校正电流输出信号，其表示平均转换器级负载电流和局部负载电流之间的差异，其中通过使用通过偏置参考电流获得的充电电流对电容器进行充电来产生PWM输出信号的导通时间 输出信号与校正电流输出信号。

公开(公告)号：US20240313653A1

公开(公告)日：2024-09-19

申请号：US18678510

申请日：2024-05-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Henry L. Edwards ,  Wei Da ,  Stephen Brink ,  Joseph Maurice Khayat

IPC: H02M3/158 ,  H02M1/08 ,  H02M1/34

CPC classification number: H02M3/158 ,  H02M1/08 ,  H02M1/344

Abstract: A switching regulator includes a low-side switching transistor, a snubber transistor, a first pull-down transistor, and a second pull-down transistor. The low-side switching transistor includes a first current terminal and a second current terminal. The first current terminal is coupled to a switching node. The second current terminal is coupled to a ground terminal. The snubber transistor includes a first current terminal, a second current terminal, and a control terminal. The first current terminal is coupled to the switching node. The second current terminal is coupled to the ground terminal. The first pull-down transistor is coupled between the control terminal of the snubber transistor and the ground terminal. The second pull-down transistor is coupled between the control terminal of the snubber transistor and the ground terminal.

公开(公告)号：US11462616B2

公开(公告)日：2022-10-04

申请号：US15602908

申请日：2017-05-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joseph Maurice Khayat ,  Marco Corsi ,  Lemuel Herbert Thompson

IPC: H01L29/10 ,  H03K19/0185 ,  H01L29/40 ,  H01L29/78 ,  H03K17/06 ,  H01L29/06 ,  H01L29/423

Abstract: In the described examples, a driver includes a signal controller that provides a gate control signal to a gate buffer coupled to a gate of a transistor and a field plate control signal to a field plate buffer coupled to a field plate of the transistor. The signal controller provides a rising edge on the field plate control signal causing the field plate buffer to provide a bias voltage on the field plate of the transistor a predetermined amount of time after providing a rising edge on the gate control signal that causes the gate buffer to provide a turn-on voltage on the gate of the transistor that causes the transistor to transition from a cutoff region to a saturation region and to a linear region.

公开(公告)号：US09825521B2

公开(公告)日：2017-11-21

申请号：US14466463

申请日：2014-08-22

Applicant: Texas Instruments Incorporated

Inventor： Joseph Maurice Khayat

IPC: H02M1/34 ,  H02M3/158 ,  H02M3/00

CPC classification number: H02M1/34 ,  H02M3/005 ,  H02M3/1588 ,  H02M2001/344 ,  Y02B70/1466

Abstract: A method includes determining that a current at an inductor in a series transfer capacitor buck converter is decaying to zero during a first cycle. The method also includes, in response to determining that the current at the inductor is decaying to zero, enabling an electrostatic discharge (ESD) structure and turning off a low side transistor. The ESD structure is disposed at a node connecting the low side transistor, a high side transistor and the inductor. The method further includes disabling the ESD structure before the high side transistor is turned on during a next cycle following the first cycle.

公开(公告)号：US09548648B2

公开(公告)日：2017-01-17

申请号：US14318238

申请日：2014-06-27

Applicant: Texas Instruments Incorporated

Inventor： Michael G. Amaro ,  Joseph Maurice Khayat ,  Pradeep S. Shenoy

IPC: H02M3/158 ,  H02M1/08 ,  H02M3/07

CPC classification number: H02M1/08 ,  H02M3/07 ,  H02M3/1584 ,  H02M3/1588 ,  Y02B70/1466

Abstract: A power converter includes at least a first phase including a high-side MOSFET transistor (HSA) and a low-side (LS) MOSFET transistor (LSA) driving a first output inductor. The first phase further includes an active gate drive assist circuit including first MOSFET switch (first switch) and second MOSFET switch (second switch) positioned in series between a source of HSA and a drain of LSA. A capacitor (CS) is between the source of HSA and drain of LSA. A bootstrap capacitor (CA) having a reference terminal is connected to a node between the first switch and the second switch.

Abstract translation: 功率转换器至少包括驱动第一输出电感器的高边MOSFET晶体管（HSA）和低侧（LS）MOSFET晶体管（LSA））的第一相。 第一阶段还包括有源栅极驱动辅助电路，其包括串联在HSA源和LSA漏极之间的第一MOSFET开关（第一开关）和第二MOSFET开关（第二开关）。 电容器（CS）位于HSA的源极和LSA的漏极之间。 具有参考端的自举电容器（CA）连接到第一开关和第二开关之间的节点。

公开(公告)号：US20160056709A1

公开(公告)日：2016-02-25

申请号：US14466463

申请日：2014-08-22

Applicant: Texas Instruments Incorporated

Inventor： Joseph Maurice Khayat

IPC: H02M1/32 ,  H02M3/156

CPC classification number: H02M1/34 ,  H02M3/005 ,  H02M3/1588 ,  H02M2001/344 ,  Y02B70/1466

Abstract: A method includes determining that a current at an inductor in a series transfer capacitor buck converter is decaying to zero during a first cycle. The method also includes, in response to determining that the current at the inductor is decaying to zero, enabling an electrostatic discharge (ESD) structure and turning off a low side transistor. The ESD structure is disposed at a node connecting the low side transistor, a high side transistor and the inductor. The method further includes disabling the ESD structure before the high side transistor is turned on during a next cycle following the first cycle.

Abstract translation: 一种方法包括确定串联传输电容器降压转换器中的电感器处的电流在第一周期期间衰减到零。 该方法还包括响应于确定电感器处的电流衰减为零，使得能够实现静电放电（ESD）结构并且关断低侧晶体管。 ESD结构设置在连接低侧晶体管，高侧晶体管和电感器的节点处。 该方法还包括在第一周期之后的下一个周期期间在高侧晶体管导通之前禁止ESD结构。