Abstract:
A differential input stage of a circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. Drains of the first and third transistors couple together at a first node, and drains of the second and fourth transistors couple together at a second node. A first slew boost circuit includes a fifth transistor and a first current mirror. A gate of the fifth transistor couples to the second node. A source of the fifth transistor couples to the first node. The first current mirror couples to the fifth transistor and to the second node. A second slew boost circuit includes a sixth transistor and a second current mirror. A gate of the sixth transistor couples to the first node. A source of the sixth transistor couples to the second node. The second current mirror couples to the sixth transistor and to the first node.
Abstract:
In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.
Abstract:
A circuit is provided. In some examples, the circuit includes a first transistor having a gate and a drain coupled together and a current source coupled to the drain of the first transistor. A second transistor has a drain coupled to a source of the first transistor. A third transistor has a gate coupled to the gate of the first transistor. A fourth transistor has a drain coupled to a source of the third transistor and a gate of the fourth transistor is coupled to a gate of the second transistor. In some examples, the third transistor is configured to limit a first current between the third transistor and the fourth transistor based on an output voltage.
Abstract:
A differential input stage of a circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. Drains of the first and third transistors couple together at a first node, and drains of the second and fourth transistors couple together at a second node. A first slew boost circuit includes a fifth transistor and a first current mirror. A gate of the fifth transistor couples to the second node. A source of the fifth transistor couples to the first node. The first current mirror couples to the fifth transistor and to the second node. A second slew boost circuit includes a sixth transistor and a second current mirror. A gate of the sixth transistor couples to the first node. A source of the sixth transistor couples to the second node. The second current mirror couples to the sixth transistor and to the first node.
Abstract:
A power control integrated circuit (IC) chip can include a direct current (DC)-DC converter that outputs a switching voltage in response to a switching output enable signal. The power control IC chip can also include an inductor detect circuit that detects whether an inductor is conductively coupled to the DC-DC converter and a powered circuit component in response to an inductor detect signal. The power control IC chip can further include control logic that (i) controls the inductor detect signal based on an enable DC-DC signal and (ii) controls the switching output enable signal provided to the DC-DC converter and a linear output disable signal provided to a linear regulator based on a signal from the inductor detect circuit indicating whether the inductor is conductively coupled to the DC-DC converter and the powered circuit component.
Abstract:
A compensation circuit includes an amplifier coupled between a first voltage terminal and a common terminal. The amplifier has a first output terminal. A current source transistor has a current path coupled between a second voltage terminal and a second output terminal. A threshold voltage sense transistor has a current path coupled between the first and second output terminals. A gate and drain of the threshold voltage sense transistor are connected. An output transistor having a current path coupled between the first output terminal and a third output terminal has a gate coupled to the second output terminal.
Abstract:
Several circuits and methods for driver control of a switching circuit are disclosed. In an embodiment, a circuit for driver control of a switching circuit includes a driver circuit and a control circuit. The driver circuit is capable of being coupled to the switching circuit. The switching circuit includes a first switch and a second switch. The driver circuit is configured to control a conductive state of the switching circuit by facilitating an alternate state change of the first switch and the second switch. The control circuit is coupled to the driver circuit and is configured to detect a noise signal during a state change of the first switch. The control circuit is further configured to control the driver circuit to thereby slow down the state change of the first switch.
Abstract:
Aspects of the present invention provide a DC/DC converter for use with a supply voltage and operable to drive a load, wherein the DC/DC converter includes a VIN node, a VOUT node, a switching component, a filter, a comparator, a current detecting component and a control component. The VIN node can receive the supply voltage and the VOUT node can provide an output voltage to drive the load. The filter electrically connects the switching component with the VOUT node. The comparator can generate a comparison signal based on the output voltage. The current detecting component can detect when a current in a direction from the filter toward the VOUT node decreases to zero. The control component can control the switching component so as to provide the output voltage at the VOUT node in a discontinuous conduction mode to drive the load.
Abstract:
In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror and an amplifier, where the amplifier is coupled to a pin of the chip. The oscillator circuit also includes a first switch coupled to the pin, a second switch coupled to the pin and to a charging resistor, and a third switch coupled to the amplifier and an internal resistor, where the internal resistor is internal to the chip. The oscillator circuit includes a bias current source coupled to the current mirror. The system includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system also includes an external capacitor coupled to the pin and coupled in parallel to the external resistor, where the external capacitor is external to the chip.
Abstract:
Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.