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    LDMOS NANOSHEET TRANSISTOR
    1.
    发明申请
    LDMOS NANOSHEET TRANSISTOR 有权

    公开(公告)号：US20240413239A1

    公开(公告)日：2024-12-12

    申请号：US18525638

    申请日：2023-11-30

    Applicant: Texas Instruments Incorporated

    Inventor： Henry Litzmann Edwards ,  Daniel Pham ,  Sujatha Sampath ,  Ali Saadat ,  Orlando Lazaro ,  Vijay K. Reddy ,  Steven Kummerl

    IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

    Abstract: Disclosed examples include microelectronic devices, e.g. Integrated circuits. One example includes a microelectronic device including a nanosheet lateral drain extended metal oxide semiconductor (LDMOS) transistor with source and drain regions having a first conductivity type extending into a semiconductor substrate having an opposite second conductivity type. A superlattice of alternating layers of nanosheets of a channel region and layers of gate conductor are separated by a gate dielectric, the superlattice extending between the source region and the drain region. A drain drift region of the first conductivity type extends under the drain region and a body region of the second type extends around the source region.

    RECTIFIER WITH SIGNAL RECONSTRUCTION
    2.
    发明公开
    RECTIFIER WITH SIGNAL RECONSTRUCTION 审中-公开

    公开(公告)号：US20240283354A1

    公开(公告)日：2024-08-22

    申请号：US18653082

    申请日：2024-05-02

    Applicant: Texas Instruments Incorporated

    Inventor： Timothy Bryan Merkin ,  Orlando Lazaro ,  John Russell Broze ,  Nan Xing

    IPC: H02M1/44 ,  H02M7/217 ,  H03K5/24

    CPC classification number: H02M1/44 ,  H02M7/217 ,  H03K5/24

    Abstract: An apparatus comprises a transmitter circuit having first and second transmit outputs; a rectifier circuit having first and second rectifier inputs and first and second rectifier outputs; an isolation circuit coupled between the first transmit output and the first rectifier input, and between the second transmit output and the second rectifier input; a detector circuit coupled to the rectifier circuit; and a driver circuit having a power terminal, a reference terminal, a driver input, and a driver output, the power terminal coupled to the first rectifier output, the reference terminal coupled to the second rectifier output, and the driver input coupled to an output of the detector circuit.

    THREE-LEVEL CONVERTER USING AN AUXILIARY SWITCHED CAPACITOR CIRCUIT
    5.
    发明申请
    THREE-LEVEL CONVERTER USING AN AUXILIARY SWITCHED CAPACITOR CIRCUIT 审中-公开

    公开(公告)号：US20200021196A1

    公开(公告)日：2020-01-16

    申请号：US16584610

    申请日：2019-09-26

    Applicant: Texas Instruments Incorporated

    Inventor： Kevin Scoones ,  Orlando Lazaro ,  Alvaro Aguilar ,  Jeffrey Anthony Morroni ,  Reza Sharifi ,  Saurav Bandyopadhyay

    IPC: H02M3/158

    Abstract: In a described example, an apparatus includes a first switch coupled between a terminal for receiving an input voltage and a top plate node, and having a first control terminal; a second switch coupled between the top plate node and a switching node, and having a second control terminal; a third switch coupled between the switching node and a bottom plate node and having a third control terminal; a fourth switch coupled between the bottom plate node and a ground terminal, and having a fourth control terminal; a flying capacitor coupled between the top plate node and the bottom plate node; a fifth switch coupled between the top plate node and an auxiliary node; a sixth switch coupled between the auxiliary node and the bottom plate node; and an auxiliary capacitor coupled between the auxiliary control terminal and a ground terminal.

    Power Transistor IC with Thermocouple Having p-Thermopile and n-Thermopile
    8.
    发明公开
    Power Transistor IC with Thermocouple Having p-Thermopile and n-Thermopile 审中-公开

    公开(公告)号：US20230157175A1

    公开(公告)日：2023-05-18

    申请号：US17528990

    申请日：2021-11-17

    Applicant: Texas Instruments Incorporated

    Inventor： Henry Litzmann Edwards ,  Andres Arturo Blanco ,  Orlando Lazaro

    IPC: H01L27/16

    CPC classification number: H01L27/16 ,  H01L35/32

    Abstract: Integrated circuit apparatus, and their manufacturing methods, including an integrated power transistor and thermocouple. The power transistor is constructed in a plurality of layers formed over a semiconductor substrate. The thermocouple includes a p-thermopile and an n-thermopile that are each electrically isolated from the power transistor and the semiconductor substrate while being sensitive to temperature differences within the IC resulting from operation of the power transistor. The p-thermopile includes a p-type thermoelectric body formed in a p-type one or more of the plurality of layers. The n-thermopile includes n-type thermoelectric body formed in an n-type one or more of the plurality of layers.

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