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公开(公告)号:US10078134B2
公开(公告)日:2018-09-18
申请号:US14852104
申请日:2015-09-11
Applicant: Texas Instruments Incorporated
CPC classification number: G01S7/4865 , G01S7/4863 , G01S17/89 , H03M1/00 , H03M1/1245 , H03M1/1295 , H03M1/164 , H03M1/361
Abstract: The disclosure provides a circuit. The circuit includes a first analog to digital converter (ADC) that generates a coarse output in response to a first input and a second input. The first ADC generates the coarse output in a differential phase. A pipeline ADC generates a differential signal in response to the coarse output, the first input and the second input. The pipeline ADC generates the differential signal in a common-mode phase. The first ADC generates a common mode signal in the common-mode phase.
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公开(公告)号:US20200162097A1
公开(公告)日:2020-05-21
申请号:US16748849
申请日:2020-01-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jagannathan Venkataraman , Prabu Sankar Thirugnanam , Raja Reddy Patukuri , Sandeep Kesrimal Oswal
IPC: H03M3/00
Abstract: The disclosure provides a receiver with high dynamic range. The receiver includes a photodiode that generates a current signal. A coupling capacitor is coupled to the photodiode, and generates a modulation signal in response to the current signal received from the photodiode. A sigma delta analog to digital converter (ADC) is coupled to the coupling capacitor, and generates a digital data in response to the modulation signal. A digital mixer is coupled to the sigma delta ADC, and generates an in-phase component and a quadrature component corresponding to the digital data. A processor is coupled to the digital mixer, and processes the in-phase component and the quadrature component corresponding to the digital data.
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公开(公告)号:US11233525B2
公开(公告)日:2022-01-25
申请号:US16748849
申请日:2020-01-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jagannathan Venkataraman , Prabu Sankar Thirugnanam , Raja Reddy Patukuri , Sandeep Kesrimal Oswal
IPC: H03M3/00
Abstract: The disclosure provides a receiver with high dynamic range. The receiver includes a photodiode that generates a current signal. A coupling capacitor is coupled to the photodiode, and generates a modulation signal in response to the current signal received from the photodiode. A sigma delta analog to digital converter (ADC) is coupled to the coupling capacitor, and generates a digital data in response to the modulation signal. A digital mixer is coupled to the sigma delta ADC, and generates an in-phase component and a quadrature component corresponding to the digital data. A processor is coupled to the digital mixer, and processes the in-phase component and the quadrature component corresponding to the digital data.
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公开(公告)号:US20180234107A1
公开(公告)日:2018-08-16
申请号:US15950690
申请日:2018-04-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jagannathan Venkataraman , Prabu Sankar Thirugnanam , Raja Reddy Patukuri , Sandeep Kesrimal Oswal
IPC: H03M3/00
Abstract: The disclosure provides a receiver with high dynamic range. The receiver includes a photodiode that generates a current signal. A coupling capacitor is coupled to the photodiode, and generates a modulation signal in response to the current signal received from the photodiode. A sigma delta analog to digital converter (ADC) is coupled to the coupling capacitor, and generates a digital data in response to the modulation signal. A digital mixer is coupled to the sigma delta ADC, and generates an in-phase component and a quadrature component corresponding to the digital data. A processor is coupled to the digital mixer, and processes the in-phase component and the quadrature component corresponding to the digital data.
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公开(公告)号:US10581451B2
公开(公告)日:2020-03-03
申请号:US15950690
申请日:2018-04-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jagannathan Venkataraman , Prabu Sankar Thirugnanam , Raja Reddy Patukuri , Sandeep Kesrimal Oswal
IPC: H03M3/00
Abstract: The disclosure provides a receiver with high dynamic range. The receiver includes a photodiode that generates a current signal. A coupling capacitor is coupled to the photodiode, and generates a modulation signal in response to the current signal received from the photodiode. A sigma delta analog to digital converter (ADC) is coupled to the coupling capacitor, and generates a digital data in response to the modulation signal. A digital mixer is coupled to the sigma delta ADC, and generates an in-phase component and a quadrature component corresponding to the digital data. A processor is coupled to the digital mixer, and processes the in-phase component and the quadrature component corresponding to the digital data.
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公开(公告)号:US20160329906A1
公开(公告)日:2016-11-10
申请号:US14852104
申请日:2015-09-11
Applicant: Texas Instruments Incorporated
CPC classification number: G01S7/4865 , G01S7/4863 , G01S17/89 , H03M1/00 , H03M1/1245 , H03M1/1295 , H03M1/164 , H03M1/361
Abstract: The disclosure provides a circuit. The circuit includes a first analog to digital converter (ADC) that generates a coarse output in response to a first input and a second input. The first ADC generates the coarse output in a differential phase. A pipeline ADC generates a differential signal in response to the coarse output, the first input and the second input. The pipeline ADC generates the differential signal in a common-mode phase. The first ADC generates a common mode signal in the common-mode phase.
Abstract translation: 本公开提供一种电路。 电路包括响应于第一输入和第二输入而产生粗略输出的第一模数转换器(ADC)。 第一个ADC在差分相位产生粗略输出。 流水线ADC响应于粗略输出(第一输入和第二输入)产生差分信号。 流水线ADC在共模相位产生差分信号。 第一个ADC在共模相位产生共模信号。
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公开(公告)号:US20150260571A1
公开(公告)日:2015-09-17
申请号:US14644308
申请日:2015-03-11
Applicant: Texas Instruments Incorporated
Inventor: Jagannathan Venkataraman , Prabu Sankar Thirugnanam , Raja Reddy Patukuri , Sandeep Kesrimal Oswal
IPC: G01J1/44 , H03M3/00 , H01L27/144
Abstract: The disclosure provides a receiver with high dynamic range. The receiver includes a photodiode that generates a current signal. A coupling capacitor is coupled to the photodiode, and generates a modulation signal in response to the current signal received from the photodiode. A sigma delta analog to digital converter (ADC) is coupled to the coupling capacitor, and generates a digital data in response to the modulation signal. A digital mixer is coupled to the sigma delta ADC, and generates an in-phase component and a quadrature component corresponding to the digital data. A processor is coupled to the digital mixer, and processes the in-phase component and the quadrature component corresponding to the digital data.
Abstract translation: 本公开提供了具有高动态范围的接收机。 接收器包括产生电流信号的光电二极管。 耦合电容器耦合到光电二极管,并且响应于从光电二极管接收的电流信号而产生调制信号。 Σ-Δ模数转换器(ADC)耦合到耦合电容器,并且响应于调制信号产生数字数据。 数字混频器耦合到Σ-ΔADC,并产生对应于数字数据的同相分量和正交分量。 处理器耦合到数字混频器,并处理与数字数据相对应的同相分量和正交分量。
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