公开(公告)号：US11899563B2

公开(公告)日：2024-02-13

申请号：US17686348

申请日：2022-03-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Venkateswar Kowkutla ,  Raghavendra Santhanagopal ,  Chunhua Hu ,  Anthony Frederick Seely ,  Nishanth Menon ,  Rajesh Kumar Vanga ,  Rejitha Nair ,  Siva Srinivas Kothamasu ,  Kazunobu Shin ,  Jason Peck ,  John Apostol

IPC: G06F13/10 ,  G06F11/36 ,  G06F9/4401 ,  G06F11/30

CPC classification number: G06F11/3656 ,  G06F9/4401 ,  G06F11/3048 ,  G06F13/102 ,  G06F2201/86 ,  G06F2213/0038

Abstract: A system on a chip (SoC) includes a first domain comprising a first processor configured to boot the SoC, and a first debug subsystem, a second domain comprising a second processor, the second domain configurable as either a safety domain or a general-purpose processing domain, and isolation circuitry between the first domain and the second domain. During boot-up of the SoC, the first processor provides code to the second domain which, when executed by the second processor, configures the second domain as either a safety domain or as a general-purpose processing domain.

公开(公告)号：US20250028835A1

公开(公告)日：2025-01-23

申请号：US18522880

申请日：2023-11-29

Applicant: Texas Instruments Incorporated

Inventor： Jonathan Bergsagel ,  Rajesh Kumar Vanga ,  Venkateswara Rao Mandela ,  Gregory Shurtz ,  Nishanth Menon

IPC: G06F21/57 ,  G06F11/22

Abstract: In described examples, a method of operating a system on chip (SoC) includes the following steps. Receive a component description that describes connections among circuit elements of the SoC. Receive a list of specified peripherals to activate while the SoC boots. Receive a hint data that describes a bypass mode clock frequency of a phase locked loop (PLL) of the SoC. Determine an operational data in response to the component description, the hint data, and the specified peripherals. The operational data specifies a subset of the circuit elements required to make the specified peripherals operational. Initialize, and limit the initializing, to the subset of the circuit elements.

公开(公告)号：US20240134776A1

公开(公告)日：2024-04-25

申请号：US18403293

申请日：2024-01-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Venkateswar Kowkutla ,  Raghavendra Santhanagopal ,  Chunhua Hu ,  Anthony Frederick Seely ,  Nishanth Menon ,  Rajesh Kumar Vanga ,  Rejitha Nair ,  Siva Srinivas Kothamasu ,  Kazunobu Shin ,  Jason Peck ,  John Apostol

IPC: G06F11/36 ,  G06F9/4401 ,  G06F11/30 ,  G06F13/10

CPC classification number: G06F11/3656 ,  G06F9/4401 ,  G06F11/3048 ,  G06F13/102 ,  G06F2201/86 ,  G06F2213/0038

Abstract: A system, e.g., a system on a chip (SoC) includes a first domain including a first processor configured to boot the system; a second domain including a processing subsystem having a second processor; and isolation circuitry between the first domain and the second domain During boot-up of the system, the first processor provides code to the second domain. When the code is executed by the second processor, it configures the processing subsystem as either a safety domain or as a general-purpose processing domain. The safety domain may an external safety domain or an internal safety domain.