公开(公告)号：US11962318B2

公开(公告)日：2024-04-16

申请号：US17568972

申请日：2022-01-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Himanshu Varshney ,  Viswanathan Nagarajan ,  Charls Babu ,  Narasimhan Rajagopal ,  Eeshan Miglani ,  Visvesvaraya A Pentakota

IPC: H03M1/06 ,  H03M1/10 ,  H03M1/00 ,  H03M1/12

CPC classification number: H03M1/1009 ,  H03M1/002 ,  H03M1/10 ,  H03M1/12

Abstract: In described examples, an analog to digital converter (ADC), having an input operable to receive an analog signal and an output operable to output a digital representation of the analog signal, includes a voltage to delay (VD) block. The VD block is coupled to the input of the ADC and generates a delay signal responsive to a calibration signal. A backend ADC is coupled to the VD block, and receives the delay signal. The backend ADC having multiple stages including a first stage. A calibration engine is coupled to the multiple stages and the VD block. The calibration engine measures an error count of the first stage and stores a delay value of the first stage for which the error count is minimum.