公开(公告)号：US20240427717A1

公开(公告)日：2024-12-26

申请号：US18819007

申请日：2024-08-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mihir Narendra MODY ,  Ankur ANKUR ,  Vivek Vilas DHANDE ,  Kedar Satish CHITNIS ,  Niraj NANDAN ,  Brijesh JADAV ,  Shyam JAGANNATHAN ,  Prithvi Shankar YEYYADI ANANTHA ,  Santhanakrishnan Narayanan NARAYANAN

IPC: G06F13/28 ,  G06F9/48 ,  G06F13/16 ,  G06F13/42 ,  G06F15/78

Abstract: Systems and methods in which trace data is efficiently managed are provided. An example system includes a memory, a first interface, and a processing resource communicably coupled to the first interface and to the memory. The processing resource includes a buffer, and a first controller to transmit a set of data from the buffer with associated trace information for the set of data to the memory. A second controller transmits the set of data with the associated trace information from the memory to a second interface.

公开(公告)号：US20230267084A1

公开(公告)日：2023-08-24

申请号：US17677638

申请日：2022-02-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mihir Narendra MODY, JR. ,  Ankur ANKUR ,  Vivek Vilas DHANDE ,  Kedar Satish CHITNIS ,  Niraj NANDAN ,  Brijesh JADAV ,  Shyam JAGANNATHAN ,  Prithvi Shankar YEYYADI ANANTHA ,  Santhanakrishnan Narayanan NARAYANAN

IPC: G06F13/28 ,  G06F13/16 ,  G06F13/42 ,  G06F15/78 ,  G06F9/48

CPC classification number: G06F13/28 ,  G06F13/1673 ,  G06F13/4221 ,  G06F15/7807 ,  G06F9/4881

Abstract: A system-on-chip (SoC) in which trace data is managed includes a first memory device, a first interface to couple the first memory to a second memory external to the system-on-chip, and a first processing resource coupled to the first interface and the first memory device. The first processing resource includes a data buffer and a first direct access memory (DMA) controller. The first DMA controller transmits data from the data buffer to the first interface over a first channel, and transmits the data from the data buffer with associated trace information for the data to the first memory device over a second channel.