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公开(公告)号：US20140159814A1
公开(公告)日：2014-06-12
申请号：US14048750
申请日：2013-10-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Weicheng Zhang , Huanzhang Huang , Yanli Fan , Mark W. Morgan
IPC: H03F3/45
CPC classification number: H03F3/45219 , H03F3/45632 , H03F2203/45466 , H03F2203/45646 , H03F2203/45648
Abstract: A differential receiver with reduced common mode induced propagation delay variance. One implementation of a differential receiver includes a first differential amplifier, a second differential amplifier, and a first current source. The first differential amplifier includes a first transistor pair. The second differential amplifier includes a second transistor pair. The first current source is coupled to a drain node of a first transistor of the first transistor pair. The first current source is configured to generate a variable first current at the drain node as of function of a sum of a variable tail current of the first differential amplifier and a variable tail current of the second differential amplifier.
Abstract translation: 具有降低的共模感应传播延迟方差的差分接收机。 差分接收机的一个实施方式包括第一差分放大器，第二差分放大器和第一电流源。 第一差分放大器包括第一晶体管对。 第二差分放大器包括第二晶体管对。 第一电流源耦合到第一晶体管对的第一晶体管的漏极节点。 第一电流源被配置为根据第一差分放大器的可变尾电流和第二差分放大器的可变尾电流的和的函数，在漏极节点处产生可变的第一电流。
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公开(公告)号：US20210119533A1
公开(公告)日：2021-04-22
申请号：US16805251
申请日：2020-02-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Jian Liang , Weicheng Zhang , Linghan Xie
Abstract: A converter system includes a first switch, a first sensing unit configured to generate a first sensed signal proportional to a current through the first switch, a second sensing unit (118) configured to generate a second sensed signal based on a difference between a reference voltage and a feedback voltage, a DC compensation unit configured to generate a slope peak DC signal relative to a slope peak of a slope compensation signal, and a signal combination unit configured to generate a control signal based on the first and second sensed signals, the slope compensation signal and the slope peak DC signal to switch off the first switch.
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公开(公告)号：US10666144B1
公开(公告)日：2020-05-26
申请号：US16449659
申请日：2019-06-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Linghan Xie , Jianzhang Xie , Wei Zhao , Weicheng Zhang
Abstract: A DC-DC converter controller includes a transistor driver, a flip-flop, a comparator, an integrator circuit, a switch, and a pulse generator circuit. The flip-flop includes an output coupled to an input of the transistor driver. The comparator includes an output coupled an input of the flip-flop. The integrator circuit includes an output coupled to an input of the comparator. The switch includes a first terminal coupled to the output of the integrator circuit, and a second terminal coupled to ground. The pulse generator circuit includes an input coupled to an output of the transistor driver, and an output coupled to a third terminal of the switch.
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公开(公告)号：US20170257098A1
公开(公告)日：2017-09-07
申请号：US15600378
申请日：2017-05-19
Applicant: Texas Instruments Incorporated
Inventor： Weicheng Zhang , Huanzhang Huang , Yanli Fan , Roland Sperlich
IPC: H03K19/0944
CPC classification number: H03K19/0944 , H03K19/018578
Abstract: A driver includes first and second resistors coupled to a supply voltage and coupled to pairs of main transistors at positive and negative output nodes. The first and second pairs of main transistors provide emphasis and de-emphasis on the positive and negative output nodes. The driver also includes a delay inverter, a pull up booster and a pull down booster. The delay inverter delays and inverts each of a pair of differential input signals to provide delayed and inverted differential signals. The pull up booster provides a bypass current path that bypasses the first and second resistors but includes at least some of the first and second pairs of main transistors. The pull down booster provides an additional current path from the supply voltage through the first or second resistor to ground.
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公开(公告)号：US11569743B2
公开(公告)日：2023-01-31
申请号：US17116794
申请日：2020-12-09
Applicant: Texas Instruments Incorporated
Inventor： Yangwei Yu , Jian Liang , Weicheng Zhang , Ming Luo
Abstract: A DC-DC converter control circuit includes an error amplifier, a voltage-to-current conversion circuit, an oscillator circuit, and a pulse frequency modulation (PFM) control circuit. The error amplifier is configured to generate a difference voltage as a difference of an output voltage of the DC-DC converter circuit and a reference voltage. The voltage-to-current conversion circuit configured to convert the difference voltage to a difference current. The oscillator circuit is configured to generate a clock signal at a predetermined frequency for pulse width modulation. The PFM control circuit is configured to disable the oscillator circuit, based on the difference current, for PFM operation.
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Patent Agency Ranking
公开(公告)号：US10298238B2
公开(公告)日：2019-05-21
申请号：US15600378
申请日：2017-05-19
Applicant: Texas Instruments Incorporated
Inventor： Weicheng Zhang , Huanzhang Huang , Yanli Fan , Roland Sperlich
IPC: H03K17/16 , H03K19/0944 , H03K19/0185
Abstract: A driver includes first and second resistors coupled to a supply voltage and coupled to pairs of main transistors at positive and negative output nodes. The first and second pairs of main transistors provide emphasis and de-emphasis on the positive and negative output nodes. The driver also includes a delay inverter, a pull up booster and a pull down booster. The delay inverter delays and inverts each of a pair of differential input signals to provide delayed and inverted differential signals. The pull up booster provides a bypass current path that bypasses the first and second resistors but includes at least some of the first and second pairs of main transistors. The pull down booster provides an additional current path from the supply voltage through the first or second resistor to ground.
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公开(公告)号：US09660652B2
公开(公告)日：2017-05-23
申请号：US14847264
申请日：2015-09-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Weicheng Zhang , Huanzhang Huang , Yanli Fan , Roland Sperlich
IPC: H03K17/16 , H03K19/0944
CPC classification number: H03K19/0944 , H03K19/018578
Abstract: A driver includes first and second resistors coupled to a supply voltage and coupled to pairs of main transistors at positive and negative output nodes. The first and second pairs of main transistors provide emphasis and de-emphasis on the positive and negative output nodes. The driver also includes a delay inverter, a pull up booster and a pull down booster. The delay inverter delays and inverts each of a pair of differential input signals to provide delayed and inverted differential signals. The pull up booster provides a bypass current path that bypasses the first and second resistors but includes at least some of the first and second pairs of main transistors. The pull down booster provides an additional current path from the supply voltage through the first or second resistor to ground.
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公开(公告)号：US09337789B2
公开(公告)日：2016-05-10
申请号：US14048750
申请日：2013-10-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Weicheng Zhang , Huanzhang Huang , Yanli Fan , Mark W. Morgan
IPC: H03F3/45
CPC classification number: H03F3/45219 , H03F3/45632 , H03F2203/45466 , H03F2203/45646 , H03F2203/45648
Abstract: A differential receiver with reduced common mode induced propagation delay variance. One implementation of a differential receiver includes a first differential amplifier, a second differential amplifier, and a first current source. The first differential amplifier includes a first transistor pair. The second differential amplifier includes a second transistor pair. The first current source is coupled to a drain node of a first transistor of the first transistor pair. The first current source is configured to generate a variable first current at the drain node as of function of a sum of a variable tail current of the first differential amplifier and a variable tail current of the second differential amplifier.
Abstract translation: 具有降低的共模感应传播延迟方差的差分接收机。 差分接收机的一个实施方式包括第一差分放大器，第二差分放大器和第一电流源。 第一差分放大器包括第一晶体管对。 第二差分放大器包括第二晶体管对。 第一电流源耦合到第一晶体管对的第一晶体管的漏极节点。 第一电流源被配置为根据第一差分放大器的可变尾电流和第二差分放大器的可变尾电流的和的函数，在漏极节点处产生可变的第一电流。
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公开(公告)号：US20230029559A1
公开(公告)日：2023-02-02
申请号：US17385904
申请日：2021-07-27
Applicant: Texas Instruments Incorporated
Inventor： Chen Feng , Jian Liang , Weicheng Zhang
Abstract: In described examples, a boost converter includes an inductor, a voltage input, a current regulator, an intermediate node, a transistor, and a regulation circuit. The inductor has first and second terminals. The voltage input provides an input voltage, and is coupled to the first inductor terminal. The current regulator has current regulator input and output. The current regulator input is coupled to the second inductor terminal. The current regulator allows current to flow from the current regulator input to the current regulator output, and not vice versa. The intermediate node provides a node voltage. The transistor includes a source, a drain, and a gate. The drain is coupled to the current regulator output via the intermediate node. The regulation circuit includes a first regulation input coupled to receive the input voltage, a second regulation input coupled to the intermediate node, and a regulation output coupled to the gate.
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公开(公告)号：US11567520B2
公开(公告)日：2023-01-31
申请号：US17231176
申请日：2021-04-15
Applicant: Texas Instruments Incorporated
Inventor： Weicheng Zhang , Jian Liang
Abstract: A voltage converter includes an inductor, a transistor, a comparator, an error amplifier, and a slope generator circuit. The transistor has a control input and first and second transistor current terminals. The first current terminal is coupled to the inductor. The comparator has first and second comparator inputs and a comparator output. The comparator output is usable to control the transistor's control input. The error amplifier has an error amplifier input and an error amplifier output. The error amplifier output is coupled to the first comparator input. The slope generator circuit is coupled to at least one of the first or second comparator inputs. The slope generator circuit is configured to generate a slope compensation current which, during at least a portion of each cycle of operation of the voltage regulator, varies approximately exponentially with respect to time.
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