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公开(公告)号：US10394740B1
公开(公告)日：2019-08-27
申请号：US16126665
申请日：2018-09-10
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Shita Guo , Yanli Fan , Huanzhang Huang , Yonghui Tang , Yanfei Jiang
Abstract: An apparatus includes a transistor with a control terminal, a first current terminal, and a second current terminal. The apparatus also includes a charge pump coupled to the control terminal of the transistor via a first and second paths. The first path comprises a first resistor and the second path comprises a second resistor in series with a diode. The first resistor has a higher resistance value than the second resistor.
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公开(公告)号：US11153135B1
公开(公告)日：2021-10-19
申请号：US17146454
申请日：2021-01-11
Applicant: Texas Instruments Incorporated
Inventor： Shita Guo , Yanli Fan , Mustafa Ulvi Erdogan , Douglas Edward Wente
IPC: H04L25/03
Abstract: Methods and systems of adaptive equalization to compensate channel loss are disclosed. A method includes detecting a peak amplitude of an equalizer output signal and selecting a set of reference voltage levels from M sets based on the peak amplitude of the equalizer output signal, each of the M sets having N reference voltage levels. The method includes continuing to increase an equalization level in predetermined steps to a next higher equalization level if the applied equalization level does not correspond to the over-equalization level and evaluating the distribution of the resulting hit counts for each increase to the next higher equalization level until the applied equalization level corresponds to the over-equalization level. The method includes decreasing to the previously applied lower equalization level if the applied equalization level corresponds to the over-equalization level.
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公开(公告)号：US20190305811A1
公开(公告)日：2019-10-03
申请号：US16445291
申请日：2019-06-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Jikai Chen , Yuan Rao , Yanli Fan
Abstract: A circuit includes a sensor configured to receive an input signal and to provide a sensor output signal in response to the received input signal. A plurality of mirror circuits are configured to receive the sensor output signal from the sensor and to generate mirror circuit output signals. The plurality of mirror circuits includes a first mirror circuit and at least a second mirror circuit. The first mirror circuit increases its respective mirror circuit output signal until its saturation value is reached. The second mirror circuit increases its respective mirror output signal if the sensor output signal is above a threshold value and until its saturation value is reached.
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公开(公告)号：US10298238B2
公开(公告)日：2019-05-21
申请号：US15600378
申请日：2017-05-19
Applicant: Texas Instruments Incorporated
Inventor： Weicheng Zhang , Huanzhang Huang , Yanli Fan , Roland Sperlich
IPC: H03K17/16 , H03K19/0944 , H03K19/0185
Abstract: A driver includes first and second resistors coupled to a supply voltage and coupled to pairs of main transistors at positive and negative output nodes. The first and second pairs of main transistors provide emphasis and de-emphasis on the positive and negative output nodes. The driver also includes a delay inverter, a pull up booster and a pull down booster. The delay inverter delays and inverts each of a pair of differential input signals to provide delayed and inverted differential signals. The pull up booster provides a bypass current path that bypasses the first and second resistors but includes at least some of the first and second pairs of main transistors. The pull down booster provides an additional current path from the supply voltage through the first or second resistor to ground.
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公开(公告)号：US09716500B2
公开(公告)日：2017-07-25
申请号：US14819077
申请日：2015-08-05
Applicant: TEXAS INSTRUMENTS INCORPORATED
IPC: H03K19/018 , H03K19/0185
CPC classification number: H03K19/018507 , H03K19/00315
Abstract: Driving a back-gate of a transistor with a follower signal that corresponds to an information signal. At least some of the illustrative embodiments are methods including: passing an information signal from a drain terminal to a source terminal of a main field effect transistor (FET), the information signal has a peak-to-peak voltage; generating a follower signal that corresponds to the information signal, the follower signal electrically isolated from the information signal, and the follower signal has a peak-to-peak voltage lower than the peak-to-peak voltage of the information signal; and applying the follower signal to a back-gate of the main FET.
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Patent Agency Ranking
公开(公告)号：US10979252B1
公开(公告)日：2021-04-13
申请号：US16892943
申请日：2020-06-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: Aspects of the disclosure provide for a circuit comprising a transmitter. In at least some examples, the transmitter is configured to receive an input signal and a loss of signal indication signal. The transmitter is further configured to dynamically modify processing of the input signal based on the loss of signal indication signal. The transmitter modifies processing of the input signal based on the loss of signal indication signal by processing the input signal via a limiting driver signal path to generate an output signal when the loss of signal indication signal has a first value and processing the input signal via a linear driver signal path to generate the output signal when the loss of signal indication signal has a second value.
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公开(公告)号：US10782717B1
公开(公告)日：2020-09-22
申请号：US16656742
申请日：2019-10-18
Applicant: Texas Instruments Incorporated
Inventor： Jikai Chen , Yonghui Tang , Yuan Rao , Huanzhang Huang , Yanli Fan
Abstract: A jitter compensation circuit operates in a first conduction state responsive to a high-to low transition of data and a low-to-high transition of data. The circuit operates in a second conduction state when there is no transition of data. The circuit compensates charge to a voltage supply in the first conduction state, thereby reducing voltage drop caused by transition of data.
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公开(公告)号：US10483976B1
公开(公告)日：2019-11-19
申请号：US15989135
申请日：2018-05-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Jikai Chen , Yanli Fan
IPC: H03K19/0185 , H03K5/08 , H03K3/356
Abstract: In examples, an apparatus comprises a pin, an input buffer coupled to the pin at an output of the input buffer, a voltage divider circuit coupled to the input buffer at an input of the input buffer, a first current mirror coupled to the input buffer, and a second current mirror coupled to the input buffer. The apparatus also comprises a first output buffer coupled between the input buffer and the first current mirror, and a second output buffer coupled between the input buffer and the second current mirror.
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公开(公告)号：US10374647B1
公开(公告)日：2019-08-06
申请号：US15895648
申请日：2018-02-13
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Jikai Chen , Yuan Rao , Yanli Fan
Abstract: A circuit includes a sensor configured to receive an input signal and to provide a sensor output signal in response to the received input signal. A plurality of mirror circuits are configured to receive the sensor output signal from the sensor and to generate mirror circuit output signals. The plurality of mirror circuits includes a first mirror circuit and at least a second mirror circuit. The first mirror circuit increases its respective mirror circuit output signal until its saturation value is reached. The second mirror circuit increases its respective mirror output signal if the sensor output signal is above a threshold value and until its saturation value is reached.
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公开(公告)号：US20140159814A1
公开(公告)日：2014-06-12
申请号：US14048750
申请日：2013-10-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Weicheng Zhang , Huanzhang Huang , Yanli Fan , Mark W. Morgan
IPC: H03F3/45
CPC classification number: H03F3/45219 , H03F3/45632 , H03F2203/45466 , H03F2203/45646 , H03F2203/45648
Abstract: A differential receiver with reduced common mode induced propagation delay variance. One implementation of a differential receiver includes a first differential amplifier, a second differential amplifier, and a first current source. The first differential amplifier includes a first transistor pair. The second differential amplifier includes a second transistor pair. The first current source is coupled to a drain node of a first transistor of the first transistor pair. The first current source is configured to generate a variable first current at the drain node as of function of a sum of a variable tail current of the first differential amplifier and a variable tail current of the second differential amplifier.
Abstract translation: 具有降低的共模感应传播延迟方差的差分接收机。 差分接收机的一个实施方式包括第一差分放大器，第二差分放大器和第一电流源。 第一差分放大器包括第一晶体管对。 第二差分放大器包括第二晶体管对。 第一电流源耦合到第一晶体管对的第一晶体管的漏极节点。 第一电流源被配置为根据第一差分放大器的可变尾电流和第二差分放大器的可变尾电流的和的函数，在漏极节点处产生可变的第一电流。
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