公开(公告)号：US20240320178A1

公开(公告)日：2024-09-26

申请号：US18672723

申请日：2024-05-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yonghui TANG ,  Yanli FAN

IPC: G06F13/40 ,  G06F13/42 ,  H03K5/1534 ,  H03K5/24

CPC classification number: G06F13/4022 ,  G06F13/4063 ,  G06F13/4282 ,  G06F13/4295 ,  G06F2213/0042 ,  H03K5/1534 ,  H03K5/24

Abstract: In an embodiment, a current source is coupled to a first current terminal of a switch, the second current terminal of which is coupled to a first data line in a communication system. An edge detector has a first input, a second input, and an output, in which the first input is coupled to a second data line in the communication system, the second input is coupled to the first data line, and the output is coupled to a control terminal of the switch. The first and second data lines may be positive and negative data lines, respectively, of the communication system.

公开(公告)号：US20190213158A1

公开(公告)日：2019-07-11

申请号：US15967883

申请日：2018-05-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yonghui TANG ,  Yanli FAN

IPC: G06F13/40 ,  G06F13/42

Abstract: In one embodiment, a current source is coupled to a channel input of a switch, and an output of the switch is coupled to a positive or negative data line in a USB 2.0 communication system. In addition, a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to a control input of the switch.

公开(公告)号：US20230039848A1

公开(公告)日：2023-02-09

申请号：US17968978

申请日：2022-10-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yonghui TANG ,  Yanli FAN

IPC: G06F13/40 ,  G06F13/42 ,  H03K5/1534 ,  H03K5/24

Abstract: In an embodiment, a current source is coupled to a first current terminal of a switch, the second current terminal of which is coupled to a first data line in a communication system. An edge detector has a first input, a second input, and an output, in which the first input is coupled to a second data line in the communication system, the second input is coupled to the first data line, and the output is coupled to a control terminal of the switch. The first and second data lines may be positive and negative data lines, respectively, of the communication system.

公开(公告)号：US20160043722A1

公开(公告)日：2016-02-11

申请号：US14819077

申请日：2015-08-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yaqi HU ,  Yanli FAN

IPC: H03K19/0185

CPC classification number: H03K19/018507 ,  H03K19/00315

Abstract: Driving a back-gate of a transistor with a follower signal that corresponds to an information signal. At least some of the illustrative embodiments are methods including: passing an information signal from a source terminal to an drain terminal of a main field effect transistor (FET), the information signal has a peak-to-peak voltage; generating a follower signal that corresponds to the information signal, the follower signal electrically isolated from the information signal, and the follower signal has a peak-to-peak voltage lower than the peak-to-peak voltage of the information signal; and applying the follower signal to a back-gate of the main FET.

Abstract translation: 用对应于信息信号的跟随信号驱动晶体管的背栅极。 至少一些说明性实施例是包括以下方法：将信号信号从源极端子传递到主场效应晶体管（FET）的漏极端子，信息信号具有峰 - 峰值电压; 产生与信息信号相对应的从动信号，与信息信号电隔离的从动信号，从动信号具有低于信号信号的峰 - 峰电压的峰峰值电压; 以及将跟随器信号施加到主FET的背栅极。

公开(公告)号：US20200327082A1

公开(公告)日：2020-10-15

申请号：US16915751

申请日：2020-06-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yonghui TANG ,  Yanli FAN

IPC: G06F13/40 ,  G06F13/42

Abstract: In one embodiment, a current source is coupled to a channel input of a switch, and an output of the switch is coupled to a positive or negative data line in a USB 2.0 communication system. In addition, a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to a control input of the switch.

公开(公告)号：US20160087633A1

公开(公告)日：2016-03-24

申请号：US14847264

申请日：2015-09-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Weicheng ZHANG ,  Huanzhang HUANG ,  Yanli FAN ,  Roland SPERLICH

IPC: H03K19/0944

CPC classification number: H03K19/0944 ,  H03K19/018578

Abstract: A driver includes first and second resistors coupled to a supply voltage and coupled to pairs of main transistors at positive and negative output nodes. The first and second pairs of main transistors provide emphasis and de-emphasis on the positive and negative output nodes. The driver also includes a delay inverter, a pull up booster and a pull down booster. The delay inverter delays and inverts each of a pair of differential input signals to provide delayed and inverted differential signals. The pull up booster provides a bypass current path that bypasses the first and second resistors but includes at least some of the first and second pairs of main transistors. The pull down booster provides an additional current path from the supply voltage through the first or second resistor to ground.

Abstract translation: 驱动器包括耦合到电源电压的第一和第二电阻器，并且耦合到正和负输出节点处的主晶体管对。 第一和第二对主晶体管对正和负输出节点提供强调和去加重。 该驱动器还包括一个延迟逆变器，一个上拉升压器和一个下拉式升压器。 延迟反相器延迟并反相一对差分输入信号，以提供延迟和反相的差分信号。 上拉升压器提供绕过第一和第二电阻器但包括第一和第二对主晶体管中的至少一些的旁路电流路径。 下拉升压器提供从电源电压通过第一或第二电阻到地的附加电流路径。