公开(公告)号：US20210193871A1

公开(公告)日：2021-06-24

申请号：US16757920

申请日：2018-10-31

Applicant: The Regents of the University of California

Inventor： Matthew S. Wong ,  David Hwang ,  Abdullah Alhassan ,  Steven P. DenBaars

IPC: H01L33/32 ,  H01L33/00 ,  H01L33/14 ,  H01L33/44

Abstract: A reduction in leakage current and an increase in efficiency of III-nitride LEDs is obtained by sidewall passivation using atomic layer deposition of a dielectric. Atomic layer deposition is a hydrogen-free deposition method, which avoids problems associated with the effects of hydrogen on passivation and transparency.

公开(公告)号：US20230420617A1

公开(公告)日：2023-12-28

申请号：US18248817

申请日：2021-10-29

Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA

Inventor： Michael Iza ,  Matthew S. Wong ,  Steven P. DenBaars ,  Shuji Nakamura

IPC: H01L33/42

CPC classification number: H01L33/42 ,  H01L33/32

Abstract: A nitride-based ultraviolet light emitting diode (UVLED) with an ultraviolet transparent contact (UVTC). The nitride-based UVLED is an alloy composition of (Ga, Al, In, B)N semiconductors, and the UVTC is composed of an oxide with a bandgap larger than that emitted in an active region of the nitride-based UVLED, wherein the oxide is an alloy composition of (Ga, Al, In, B, Mg, Fe, Si, Sn)O semiconductors, such as Ga2O3.

公开(公告)号：US20220005980A1

公开(公告)日：2022-01-06

申请号：US17281700

申请日：2019-10-31

Applicant: The Regents of the University of California

Inventor： Tal Margalith ,  Matthew S. Wong ,  Lesley Chan ,  Steven P. DenBaars

IPC: H01L33/44 ,  H01L33/32 ,  H01L33/00 ,  H01L33/02 ,  H01L21/306

Abstract: Micro-scale light emitting diodes (micro-LEDs) with ultra-low leakage current results from a sidewall passivation method for the micro-LEDs using a chemical treatment followed by conformal dielectric deposition, which reduces or eliminates sidewall damage and surface recombination, and the passivated micro-LEDs can achieve higher efficiency than micro-LEDs without sidewall treatments. Moreover, the sidewall profile of micro-LEDs can be altered by varying the conditions of chemical treatment.

公开(公告)号：US20240145625A1

公开(公告)日：2024-05-02

申请号：US18546484

申请日：2022-02-28

Applicant: The Regents of the University of California

Inventor： David Hwang ,  Matthew S. Wong ,  Shuji Nakamura

IPC: H01L33/06 ,  H01L33/00 ,  H01L33/24 ,  H01L33/32

CPC classification number: H01L33/06 ,  H01L33/007 ,  H01L33/24 ,  H01L33/325

Abstract: A device including an activated p-type layer comprising a III-Nitride based Mg-doped layer grown by vapor phase deposition or a growth method different from MBE. The p-type layer is activated through a sidewall of the p-type layer after the removal of defects from the sidewall thereby increasing a hole concentration in the p-type layer. In one or more examples, the device includes an active region between a first n-type layer and the p-type layer; a second n-type layer on the p-type layer; and a tunnel junction between the second n-type layer and the p-type layer, and the activated p-type layer has a hole concentration characterized by a current density of at least 100 Amps per centimeter square flowing between the first n-type layer and the second n-type layer in response to a voltage of 4 volts or less applied across the first n-type layer and the second n-type layer.

公开(公告)号：US20240128400A1

公开(公告)日：2024-04-18

申请号：US18547752

申请日：2022-03-04

Applicant: The Regents of the University of California

Inventor： Steven P. DenBaars ,  Matthew S. Wong

IPC: H01L33/00 ,  H01L33/32 ,  H01L33/44

CPC classification number: H01L33/0075 ,  H01L33/32 ,  H01L33/44

Abstract: Grow gallium-containing semi-conductor layers are grown on a substrate, wherein the gallium-containing semiconductor layers comprise AlxGayInzNvPwAsu, where 0≤x≤1, 0≤y≤1, 0≤z≤1, 0≤v≤1, 0≤w≤1, 0≤u≤1, v+w+u=1, and x+y+z=1. Dry etching of the gallium-containing semiconductor layers exposes sidewalls of the layers. Surface treatments are performed to recover from damage to the sidewalls resulting from the dry etching. Dielectric materials are deposited on the sidewalls, for example, by atomic layer deposition (ALD), to passivate the sidewalls. The resulting gallium-containing semiconductor layers have an improvement in optical efficiency as compared to gallium-containing semiconductor layers that are not subjected to the surface treatments and the deposition of the dielectric materials.

公开(公告)号：US20230197896A1

公开(公告)日：2023-06-22

申请号：US17768182

申请日：2020-10-30

Applicant: The Regents of the University of California

Inventor： Matthew S. Wong ,  Jordan M. Smith ,  Steven P. DenBaars

IPC: H01L33/32 ,  H01L33/24

CPC classification number: H01L33/32 ,  H01L33/24 ,  H01L33/0062

Abstract: Gallium-containing semiconductor layers are grown on a substrate, followed by dry etching of the gallium-containing semiconductor layers during fabrication of a device. After the dry etching, surface treatments are performed to remove damage from the sidewalls of the device. After the surface treatments, dielectric materials are deposited on the sidewalls of the device to passivate the sidewalls of the device. These steps result in an improvement in forward current-voltage characteristics and reduction in leakage current of the device, as well as an enhancement of light output power and efficiency of the device.