公开(公告)号：US09454081B2

公开(公告)日：2016-09-27

申请号：US14323664

申请日：2014-07-03

Applicant: TOKYO ELECTRON LIMITED

Inventor： Mark H Somervell ,  Benjamen M Rathsack ,  Ian J Brown ,  Steven Scheer ,  Joshua S Hooge

IPC: H01L21/3105 ,  G03F7/40 ,  G03F7/30 ,  G03F7/038 ,  G03F7/20 ,  G03F7/38

CPC classification number: G03F7/405 ,  G03F7/038 ,  G03F7/0384 ,  G03F7/2024 ,  G03F7/30 ,  G03F7/38 ,  G03F7/40

Abstract: Disclosed is a method and apparatus for mitigation of photoresist line pattern collapse in a photolithography process by applying a gap-fill material treatment after the post-development line pattern rinse step. The gap-fill material dries into a solid layer filling the inter-line spaces of the line pattern, thereby preventing line pattern collapse due to capillary forces during the post-rinse line pattern drying step. Once dried, the gap-fill material is depolymerized, volatilized, and removed from the line pattern by heating, illumination with ultraviolet light, by application of a catalyst chemistry, or by plasma etching.

Abstract translation: 公开了一种用于通过在显影后图案漂洗步骤之后施加间隙填充材料处理来减轻光刻工艺中的光致抗蚀剂线图案塌陷的方法和装置。 间隙填充材料干燥成填充线图案的间隔空间的固体层，从而防止在后冲洗线图案干燥步骤期间由于毛细管力引起的线图案塌陷。 一旦干燥，间隙填充材料通过加热，用紫外线照射，通过施加催化剂化学或通过等离子体蚀刻从线图案解聚，挥发和除去。

公开(公告)号：US09281251B2

公开(公告)日：2016-03-08

申请号：US14453352

申请日：2014-08-06

Applicant: Tokyo Electron Limited

Inventor： Carlos A Fonseca ,  Anton Devilliers ,  Benjamen M Rathsack ,  Jeffrey T Smith ,  Lior Huli

IPC: C23F1/00 ,  H01L21/66 ,  H01L21/306 ,  G03F7/20

CPC classification number: H01L21/02016 ,  G03F7/70783 ,  H01L21/30625 ,  H01L21/687 ,  H01L22/12 ,  H01L22/20

Abstract: Embodiments described relate to a method and apparatus for reducing lithographic distortion. A backside of a semiconductor substrate may be texturized. Then a lithographic process may be performed on the semiconductor substrate having the texturized backside.

Abstract translation: 所描述的实施例涉及一种减小光刻畸变的方法和装置。 半导体衬底的背面可以被组织化。 然后可以在具有纹理化背面的半导体衬底上进行光刻工艺。