公开(公告)号：US20190296040A1

公开(公告)日：2019-09-26

申请号：US16122258

申请日：2018-09-05

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Kotaro FUJII ,  Masahisa SONODA ,  Masaru KITO ,  Satoshi NAGASHIMA ,  Shigeki KOBAYASHI

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  G11C16/04 ,  G11C16/14 ,  G11C16/08

Abstract: A semiconductor device according to an embodiment includes first conductors, first pillars, a pillar column. Each of the first pillars is provided through the first conductors. The pillar column includes second pillars that are aligned in a first direction. Each of the second pillars is provided through the first conductors. The pillar column includes first and second columns of the second pillars. The first and second columns of the second pillars are aligned in a second direction that intersects the first direction. The first pillars are arranged on both sides in the second direction of each pillar column. The first conductors are provided continuously on both sides in the second direction of the second pillars that are included in each pillar column.

公开(公告)号：US20200303402A1

公开(公告)日：2020-09-24

申请号：US16530221

申请日：2019-08-02

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Shigeki KOBAYASHI ,  Taro SHIOKAWA ,  Masahisa SONODA

IPC: H01L27/11582 ,  G11C5/06 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11519 ,  H01L27/11565

Abstract: A semiconductor memory device includes a plurality of first conductor layers that are stacked in a first direction; a first pillar including a first semiconductor layer and extending through the first conductor layers in the first direction; a first charge storage layer that is provided between the first conductor layers and the first semiconductor layer; a plurality of second conductor layers that are stacked in the first direction above an uppermost conductor layer of the first conductor layers; a second pillar including a second semiconductor layer and extending through the second conductor layers in the first direction, the second semiconductor layer electrically connected to the first semiconductor layer; and a conductor pillar or film extending in the first direction through the second conductor layers other than a lowermost layer of the second conductor layers and being in contact with a respective upper surface of each of the second conductor layers.