公开(公告)号：US11031325B2

公开(公告)日：2021-06-08

申请号：US16656617

申请日：2019-10-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiang-Ku Shen ,  Chun-Li Lin ,  Dian-Hau Chen

IPC: H01L23/495 ,  H01L23/498 ,  H01L23/532 ,  H01L21/48 ,  H01L21/02

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a redistribution layer including a first conductive feature and a second conductive feature, a first contact feature disposed over and electrically coupled to the first conductive feature, a second contact feature disposed over and electrically coupled to the second conductive feature, and a passivation feature extending from between the first conductive feature and the second conductive feature between the first contact feature and the second contact feature. The passivation feature includes a dielectric feature and a dielectric layer. The dielectric layer is disposed on a planar top surface of the dielectric feature and a composition of the dielectric feature is different from a composition of the dielectric layer.

公开(公告)号：US09761592B2

公开(公告)日：2017-09-12

申请号：US14470399

申请日：2014-08-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD

Inventor： Geng-Shuoh Chang ,  Yung-Tsun Liu ,  Chun-Sheng Wu ,  Chun-Li Lin ,  Yi-Fang Li

IPC: H01L27/108 ,  H01L23/64 ,  H01L23/485 ,  H01L23/522 ,  H01L49/02

CPC classification number: H01L27/10855 ,  H01L23/485 ,  H01L23/5223 ,  H01L23/642 ,  H01L27/10805 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/90 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device also includes a contact plug in the dielectric layer, and a recess extending from a surface of the dielectric layer towards the contact plug. The semiconductor device further includes a capacitor element in the recess and electrically connected to the contact plug.

公开(公告)号：US20230307333A1

公开(公告)日：2023-09-28

申请号：US18329327

申请日：2023-06-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiang-Ku Shen ,  Chun-Li Lin ,  Dian-Hau Chen

IPC: H01L23/498 ,  H01L23/532 ,  H01L21/48 ,  H01L21/02

CPC classification number: H01L23/49811 ,  H01L23/53233 ,  H01L21/486 ,  H01L21/02274 ,  H01L23/53295 ,  H01L23/53219

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a redistribution layer including a first conductive feature and a second conductive feature, a first contact feature disposed over and electrically coupled to the first conductive feature, a second contact feature disposed over and electrically coupled to the second conductive feature, and a passivation feature extending from between the first conductive feature and the second conductive feature between the first contact feature and the second contact feature. The passivation feature includes a dielectric feature and a dielectric layer. The dielectric layer is disposed on a planar top surface of the dielectric feature and a composition of the dielectric feature is different from a composition of the dielectric layer.

公开(公告)号：US20210287973A1

公开(公告)日：2021-09-16

申请号：US17337965

申请日：2021-06-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiang-Ku Shen ,  Chun-Li Lin ,  Dian-Hau Chen

IPC: H01L23/498 ,  H01L23/532 ,  H01L21/48 ,  H01L21/02

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a redistribution layer including a first conductive feature and a second conductive feature, a first contact feature disposed over and electrically coupled to the first conductive feature, a second contact feature disposed over and electrically coupled to the second conductive feature, and a passivation feature extending from between the first conductive feature and the second conductive feature between the first contact feature and the second contact feature. The passivation feature includes a dielectric feature and a dielectric layer. The dielectric layer is disposed on a planar top surface of the dielectric feature and a composition of the dielectric feature is different from a composition of the dielectric layer.

公开(公告)号：US10153285B2

公开(公告)日：2018-12-11

申请号：US15695599

申请日：2017-09-05

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Geng-Shuoh Chang ,  Yung-Tsun Liu ,  Chun-Sheng Wu ,  Chun-Li Lin ,  Yi-Fang Li

IPC: H01L27/108 ,  H01L49/02 ,  H01L23/64 ,  H01L23/485 ,  H01L23/522

Abstract: A method for forming a semiconductor device is provided. The method includes forming a dielectric layer over a semiconductor substrate and forming a contact plug in the dielectric layer. The method also includes partially removing the contact plug to form a recess over the contact plug. The method further includes forming a capacitor element in the recess.

公开(公告)号：US09209071B2

公开(公告)日：2015-12-08

申请号：US14229264

申请日：2014-03-28

Applicant: Taiwan Semiconductor Manufacturing CO., LTD.

Inventor： Geng-Shuoh Chang ,  Chun-Sheng Wu ,  Chun-Li Lin ,  Yi-Fang Li ,  Po-Hsiung Leu ,  Ding-I Liu

IPC: H01L21/4763 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76831 ,  H01L21/28518 ,  H01L21/76805 ,  H01L21/76832 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor structure includes a semiconductor substrate, a dielectric layer formed over the semiconductor substrate, a first anti-etch layer, a second anti-etch layer and a conductive material. The dielectric layer has an opening. The first anti-etch layer is formed on the sidewall of the opening and made of a material having resistance to peroxide. The second anti-etch layer is formed over the first anti-etch layer and made of a material having resistance to acid. The conductive material is formed within the opening and in contact with the second anti-etch layer.

Abstract translation: 半导体结构包括半导体衬底，形成在半导体衬底上的电介质层，第一抗蚀刻层，第二抗蚀刻层和导电材料。 电介质层具有开口。 第一抗蚀刻层形成在开口的侧壁上并由具有过氧化物的材料制成。 第二抗蚀刻层形成在第一抗蚀刻层上并由耐酸性的材料制成。 导电材料形成在开口内并与第二抗蚀刻层接触。

公开(公告)号：US20240312885A1

公开(公告)日：2024-09-19

申请号：US18672485

申请日：2024-05-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiang-Ku Shen ,  Chun-Li Lin ,  Dian-Hau Chen

IPC: H01L23/498 ,  H01L21/02 ,  H01L21/48 ,  H01L23/532

CPC classification number: H01L23/49811 ,  H01L21/02274 ,  H01L21/486 ,  H01L23/53219 ,  H01L23/53233 ,  H01L23/53295

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a redistribution layer including a first conductive feature and a second conductive feature, a first contact feature disposed over and electrically coupled to the first conductive feature, a second contact feature disposed over and electrically coupled to the second conductive feature, and a passivation feature extending from between the first conductive feature and the second conductive feature between the first contact feature and the second contact feature. The passivation feature includes a dielectric feature and a dielectric layer. The dielectric layer is disposed on a planar top surface of the dielectric feature and a composition of the dielectric feature is different from a composition of the dielectric layer.

公开(公告)号：US11996356B2

公开(公告)日：2024-05-28

申请号：US18329327

申请日：2023-06-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiang-Ku Shen ,  Chun-Li Lin ,  Dian-Hau Chen

IPC: H01L23/495 ,  H01L21/02 ,  H01L21/48 ,  H01L23/498 ,  H01L23/532

CPC classification number: H01L23/49811 ,  H01L21/02274 ,  H01L21/486 ,  H01L23/53219 ,  H01L23/53233 ,  H01L23/53295

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a redistribution layer including a first conductive feature and a second conductive feature, a first contact feature disposed over and electrically coupled to the first conductive feature, a second contact feature disposed over and electrically coupled to the second conductive feature, and a passivation feature extending from between the first conductive feature and the second conductive feature between the first contact feature and the second contact feature. The passivation feature includes a dielectric feature and a dielectric layer. The dielectric layer is disposed on a planar top surface of the dielectric feature and a composition of the dielectric feature is different from a composition of the dielectric layer.

公开(公告)号：US20210118783A1

公开(公告)日：2021-04-22

申请号：US16656617

申请日：2019-10-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiang-Ku Shen ,  Chun-Li Lin ,  Dian-Hau Chen

IPC: H01L23/498 ,  H01L23/532 ,  H01L21/02 ,  H01L21/48

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a redistribution layer including a first conductive feature and a second conductive feature, a first contact feature disposed over and electrically coupled to the first conductive feature, a second contact feature disposed over and electrically coupled to the second conductive feature, and a passivation feature extending from between the first conductive feature and the second conductive feature between the first contact feature and the second contact feature. The passivation feature includes a dielectric feature and a dielectric layer. The dielectric layer is disposed on a planar top surface of the dielectric feature and a composition of the dielectric feature is different from a composition of the dielectric layer.

公开(公告)号：US20150279729A1

公开(公告)日：2015-10-01

申请号：US14229264

申请日：2014-03-28

Applicant: Taiwan Semiconductor Manufacturing CO., LTD.

Inventor： Geng-Shuoh Chang ,  Chun-Sheng Wu ,  Chun-Li Lin ,  Yi-Fang Li ,  Po-Hsiung Leu ,  Ding-I Liu

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L21/76831 ,  H01L21/28518 ,  H01L21/76805 ,  H01L21/76832 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor structure includes a semiconductor substrate, a dielectric layer formed over the semiconductor substrate, a first anti-etch layer, a second anti-etch layer and a conductive material. The dielectric layer has an opening. The first anti-etch layer is formed on the sidewall of the opening and made of a material having resistance to peroxide. The second anti-etch layer is formed over the first anti-etch layer and made of a material having resistance to acid. The conductive material is formed within the opening and in contact with the second anti-etch layer.

Abstract translation: 半导体结构包括半导体衬底，形成在半导体衬底上的电介质层，第一抗蚀刻层，第二抗蚀刻层和导电材料。 电介质层具有开口。 第一抗蚀刻层形成在开口的侧壁上并由具有过氧化物的材料制成。 第二抗蚀刻层形成在第一抗蚀刻层上并由耐酸性的材料制成。 导电材料形成在开口内并与第二抗蚀刻层接触。