公开(公告)号：US20230334208A1

公开(公告)日：2023-10-19

申请号：US18341545

申请日：2023-06-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheok-Kei LEI ,  Zhe-Wei JIANG ,  Chi-Yu LU ,  Yi-Hsin KO ,  Chi-Lin LIU ,  Hui-Zhong ZHUANG

IPC: G06F30/327 ,  H01L23/52 ,  H01L23/522 ,  G06F30/392 ,  G06F30/398

CPC classification number: G06F30/327 ,  H01L23/52 ,  H01L23/5222 ,  G06F30/392 ,  G06F30/398

Abstract: The present disclosure describes a method for optimizing metal cuts in standard cells. The method includes placing a standard cell in a layout area and inserting a metal cut along a metal interconnect of the standard cell at a location away from a boundary of the standard cell. The method further includes disconnecting, at the location, a metal portion of the metal interconnect from a remaining portion of the metal interconnect based on the metal cut.

公开(公告)号：US20190095552A1

公开(公告)日：2019-03-28

申请号：US15907689

申请日：2018-02-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheok-Kei LEI ,  Chi-Lin Liu ,  Hui-Zhong Zhuang ,  Zhe-Wei Jiang ,  Chi-Yu Lu ,  Yi-Hsin Ko

IPC: G06F17/50 ,  H01L23/52

Abstract: The present disclosure describes a method for optimizing metal cuts in standard cells. The method includes placing a standard cell in an layout area and inserting a metal cut along a metal interconnect of the standard cell at a location away from a boundary of the standard cell. The method further includes disconnecting, at the location, a metal portion of the metal interconnect from a remaining portion of the metal interconnect based on the metal cut.

公开(公告)号：US20200285792A1

公开(公告)日：2020-09-10

申请号：US16881706

申请日：2020-05-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheok-Kei LEI ,  Chi-Lin LIU ,  Hui-Zhong ZHUANG ,  Zhe-Wei JIANG ,  Chi-Yu LU ,  Yi-Hsin KO

IPC: G06F30/327 ,  H01L23/52 ,  H01L23/522 ,  G06F30/392 ,  G06F30/398

Abstract: The present disclosure describes a method for optimizing metal cuts in standard cells. The method includes placing a standard cell in an layout area and inserting a metal cut along a metal interconnect of the standard cell at a location away from a boundary of the standard cell. The method further includes disconnecting, at the location, a metal portion of the metal interconnect from a remaining portion of the metal interconnect based on the metal cut.