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    INTEGRATED CIRCUIT
    1.
    发明公开
    INTEGRATED CIRCUIT 审中-公开

    公开(公告)号：US20230317730A1

    公开(公告)日：2023-10-05

    申请号：US18331011

    申请日：2023-06-07

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Guo-Huei WU ,  Chi-Yu LU ,  Ting-Yu CHEN ,  Li-Chun TIEN

    IPC: H01L27/118 ,  H01L27/02

    CPC classification number: H01L27/11807 ,  H01L27/0207 ,  H01L2027/11866 ,  H01L2027/11887 ,  H01L2027/11881 ,  H01L2027/11875 ,  H01L2027/11861 ,  H01L2027/11812

    Abstract: A method includes a first set of active areas extending in a first direction and separated from each other along a second direction in a cell; first and second gate s that cross the first set of active areas along the second direction, the first gate being shared by a first transistor of a first type and a second transistor of a second type and the second gate being shared by a third transistor of the first type and a fourth transistor of the second type; and a set of conductive lines arranged in three metal tracks in the cell and coupling at least one of terminals of the first to fourth transistors to another one of the terminals of the first to fourth transistor. The first transistor is turned off to electrically disconnect a source/drain terminal of the first transistor from a source/drain terminal of the fourth transistor.

    INTEGRATED CIRCUIT
    3.
    发明申请
    INTEGRATED CIRCUIT 有权

    公开(公告)号：US20220367519A1

    公开(公告)日：2022-11-17

    申请号：US17875257

    申请日：2022-07-27

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Guo-Huei WU ,  Chi-Yu LU ,  Ting-Yu CHEN ,  Li-Chun TIEN

    IPC: H01L27/118 ,  H01L27/02

    Abstract: A method is provided, and including operations as below: forming multiple active areas extending in a first direction; forming multiple conductive patterns extending in a second direction different from the first direction and arranged in a first layer above the active areas; forming multiple gates extending parallel to the conductive patterns; and forming a first set of conductive lines extending in the first direction and arranged in three first metal tracks that are in a second layer above the first layer, wherein one of the first set of conductive lines is arranged in a middle track of the three first metal tracks, coupled to one of the gates and overlap a first shallow trench region between two of the active areas.

    INTEGRATED CIRCUIT
    4.
    发明申请
    INTEGRATED CIRCUIT 有权

    公开(公告)号：US20220093646A1

    公开(公告)日：2022-03-24

    申请号：US17025983

    申请日：2020-09-18

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Guo-Huei WU ,  Chi-Yu LU ,  Ting-Yu CHEN ,  Li-Chun TIEN

    IPC: H01L27/118 ,  H01L27/02

    Abstract: An integrated circuit is disclosure. The integrated circuit includes a first pair of power rails, a set of conductive lines arranged in the first layer parallel to the first pair of power rails, a first set of active areas. The integrated circuit further includes a first gate arranged along the second direction, between the first pair of power rails, and crossing the first set of active areas in a layout view, wherein the first gate is configured to be shared by a first transistor of a first type and a second transistor of a second type; and a second gate and a third gate, in which the second gate is configured to be a control terminal of a third transistor, and the third gate is configured to be a control terminal of a fourth transistor which is coupled to the control terminal of the third transistor.

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