公开(公告)号：US20230378139A1

公开(公告)日：2023-11-23

申请号：US18359311

申请日：2023-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shu-Ting Tsai ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Chia-Chieh Lin ,  U-Ting Chen

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/48 ,  H01L23/00 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L25/0657 ,  H01L25/50 ,  H01L23/481 ,  H01L24/92 ,  H01L21/76898 ,  H01L2224/821 ,  H01L2224/82106 ,  H01L2224/24145 ,  H01L21/76831 ,  H01L2224/9212 ,  H01L23/53223 ,  H01L2224/80896 ,  H01L2224/8203 ,  H01L24/80 ,  H01L23/53238 ,  H01L2224/9202 ,  H01L24/82 ,  H01L2924/0002 ,  H01L21/76805 ,  H01L2225/06541 ,  H01L23/53266

Abstract: An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two integrated circuits are bonded together. A first opening is formed through one of the substrates. A multi-layer dielectric film is formed along sidewalls and a bottom of the first opening. A second opening is formed extending from the first opening to pads in the integrated circuits. A dielectric liner is formed, and the opening is filled with a conductive material to form a conductive plug.