公开(公告)号：US20210066091A1

公开(公告)日：2021-03-04

申请号：US16894545

申请日：2020-06-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Min HSIAO ,  Chien-Wen LAI ,  Ru-Gun LIU ,  Chih-Ming LAI ,  Wei-Shuo SU ,  Yu-Chen CHANG

IPC: H01L21/311 ,  H01L21/027 ,  H01L21/768

Abstract: A four signal line unit cell is formed on a substrate using a combination of an extreme ultraviolet photolithography process and one or more self aligned deposition processes. The photolithography process and the self aligned deposition processes result in spacers on a hard mask above the substrate. The spacers define a pattern of signal lines to be formed on the substrate for a unit cell. The photolithography process and self aligned deposition processes result in signal lines having a critical dimension much smaller than features that can be defined by the extreme ultraviolet photolithography process.

公开(公告)号：US20210249267A1

公开(公告)日：2021-08-12

申请号：US17240692

申请日：2021-04-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Min HSIAO ,  Chien-Wen LAI ,  Shih-Chun HUANG ,  Yung-Sung YEN ,  Chih-Ming LAI ,  Ru-Gun LIU

IPC: H01L21/033

Abstract: A method of defining a pattern includes forming a plurality of cut shapes and a first plurality of openings within a first layer of a multi-layer hard mask to expose first portions of the second layer. A plurality of etch stops is formed by implanting an etch rate modifying species in a portion of the plurality of cut shapes. The first layer is directionally etched at the plurality of cut shapes such that the plurality of etch stops remain. A spacer layer is formed on the first layer and the first portions. A second plurality of openings is formed within the spacer layer to expose second portions of the second layer. The spacer layer is directionally etched to remove the spacer layer from sidewalls of the plurality of etch stops. Portions of the second layer exposed through the first plurality of openings and the second plurality of openings are etched.

公开(公告)号：US20200176267A1

公开(公告)日：2020-06-04

申请号：US16688681

申请日：2019-11-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Min HSIAO ,  Chih-Ming LAI ,  Chien-Wen LAI ,  Ya Hui CHANG ,  Ru-Gun LIU

IPC: H01L21/311 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528

Abstract: A method for manufacturing a semiconductor device includes depositing a hard mask layer on an upper surface of an insulating layer. The hard mask layer is etched to form an opening in the hard mask layer. A via recess is formed in the insulating layer through the opening. A first photoresist layer is formed on the hard mask layer and in the via recess. The first photoresist layer is etched to form a photoresist plug in the via recess. Two opposite sides of the opening are etched to remove portions of the hard mask layer and thereby a portion of the upper surface of the insulating layer is exposed. The photoresist plug is removed. Metal is deposited in the via recess and on the exposed surface of the insulating layer. The metal is patterned.

公开(公告)号：US20240087896A1

公开(公告)日：2024-03-14

申请号：US18516719

申请日：2023-11-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Min HSIAO ,  Chien-Wen LAI ,  Ru-Gun LIU ,  Chih-Ming LAI ,  Shih-Ming CHANG ,  Yung-Sung YEN ,  Yu-Chen CHANG

IPC: H01L21/033 ,  H01L21/265 ,  H01L21/311 ,  H01L21/3115

CPC classification number: H01L21/0338 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/26586 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31155

Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.

公开(公告)号：US20220359203A1

公开(公告)日：2022-11-10

申请号：US17869707

申请日：2022-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Min HSIAO ,  Chien-Wen LAI ,  Ru-Gun LIU ,  Chih-Ming LAI ,  Shih-Ming CHANG ,  Yung-Sung YEN ,  Yu-Chen CHANG

IPC: H01L21/033 ,  H01L21/3115 ,  H01L21/311 ,  H01L21/265

Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.

公开(公告)号：US20210272808A1

公开(公告)日：2021-09-02

申请号：US16806206

申请日：2020-03-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Min HSIAO ,  Chien-Wen LAI ,  Ru-Gun LIU ,  Chih-Ming LAI ,  Shih-Ming CHANG ,  Yung-Sung YEN ,  Yu-Chen CHANG

IPC: H01L21/033 ,  H01L21/265 ,  H01L21/311 ,  H01L21/3115

Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.