公开(公告)号：US10276693B1

公开(公告)日：2019-04-30

申请号：US15799385

申请日：2017-10-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chun-An Lin ,  Chun-Hsiung Lin ,  Chia-Ta Yu ,  Sai-Hooi Yeong ,  Ching-Fang Huang ,  Wen-Hsing Hsieh

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/311 ,  H01L21/3065

Abstract: A semiconductor device includes a substrate, a bottom semiconductor fin, at least one sidewall structure, a top semiconductor fin, and a gate structure. The bottom semiconductor fin is disposed on the substrate. The sidewall structure protrudes from the semiconductor fin. The top semiconductor fin is disposed on the bottom semiconductor fin. The top semiconductor fin includes a channel portion and at least one source/drain portion. The source/drain portion is disposed between the channel portion and the sidewall structure. The gate structure covers the channel portion of the top semiconductor fin.

公开(公告)号：US09502409B2

公开(公告)日：2016-11-22

申请号：US14624782

申请日：2015-02-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jon-Hsu Ho ,  Chih-Ching Wang ,  Ching-Fang Huang ,  Wen-Hsing Hsieh ,  Tsung-Hsing Yu ,  Yi-Ming Sheu ,  Chih Chieh Yeh ,  Ken-Ichi Goto ,  Zhiqiang Wu

IPC: H01L29/78 ,  H01L27/088 ,  H01L27/092 ,  H01L29/10

CPC classification number: H01L27/0886 ,  H01L27/0924 ,  H01L29/105 ,  H01L29/7831 ,  H01L29/7833 ,  H01L29/785 ,  H01L29/7851

Abstract: A multi-gate semiconductor device is formed including a semiconductor substrate. The multi-gate semiconductor device also includes a first transistor including a first fin portion extending above the semiconductor substrate. The first transistor has a first channel region formed therein. The first channel region includes a first channel region portion doped at a first concentration of a first dopant type and a second channel region portion doped at a second concentration of the first dopant type. The second concentration is higher than the first concentration. The first transistor further includes a first gate electrode layer formed over the first channel region. The first gate electrode layer may be of a second dopant type. The first dopant type may be N-type and the second dopant type may be P-type. The second channel region portion may be formed over the first channel region portion.

公开(公告)号：US08981479B2

公开(公告)日：2015-03-17

申请号：US14108391

申请日：2013-12-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Ching Wang ,  Jon-Hsu Ho ,  Ching-Fang Huang ,  Wen-Hsing Hsieh ,  Tsung-Hsing Yu ,  Yi-Ming Sheu ,  Ken-Ichi Goto ,  Zhiqiang Wu

IPC: H01L27/12 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092 ,  H01L29/66

CPC classification number: H01L29/7855 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/66795 ,  H01L29/785

Abstract: A multi-gate semiconductor device and method for forming the same. A multi-gate semiconductor device is formed including a first fin of a first transistor formed on a semiconductor substrate having a first dopant type. The first transistor has a doped channel region of the first dopant type. The device also includes a second fin of a second transistor formed on the first dopant type semiconductor substrate. The second transistor has a doped channel region of a second dopant type. The device further includes a gate electrode layer of the second dopant type formed over the channel region of the first fin and a gate electrode layer of the first dopant type formed over the channel region of the second fin.

Abstract translation: 一种多栅半导体器件及其制造方法。 形成多栅半导体器件，其包括形成在具有第一掺杂剂类型的半导体衬底上的第一晶体管的第一鳍。 第一晶体管具有第一掺杂剂类型的掺杂沟道区。 该器件还包括形成在第一掺杂剂型半导体衬底上的第二晶体管的第二鳍。 第二晶体管具有第二掺杂剂类型的掺杂沟道区。 该器件还包括形成在第一鳍片的沟道区域上的第二掺杂剂类型的栅极电极层和形成在第二鳍片的沟道区域上的第一掺杂剂类型的栅极电极层。