公开(公告)号：US10998443B2

公开(公告)日：2021-05-04

申请号：US15130205

申请日：2016-04-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Hsin Hu ,  Huan-Tsung Huang

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08

Abstract: The present disclosure is generally directed to semiconductor structures and methods that improve breakdown characteristics in finFET device designs, while retaining cost effectiveness for integration into the process flow. The semiconductor structure includes an extended lightly-doped-drain (LDD) region formed on a source/drain structure. The extended LDD regions provide extra separation between source and drain regions, which in turn provides for an increased source to drain resistance. The increased source to drain resistance improves the breakdown voltage of the semiconductor device, and significantly reduces its susceptibility to latch-up. The source to drain resistance may be tuned by adjusting the length of epi block regions, and may also be tuned by selecting desired doping profiles for the LDD and source/drain regions. The length of epi block regions may also be adjusted to maintain high uniformity of epitaxial growth in the S/D regions.

公开(公告)号：US09691758B1

公开(公告)日：2017-06-27

申请号：US15068068

申请日：2016-03-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hsin Hu ,  Hsueh-Shih Fan ,  Huan-Tsung Huang

IPC: H01L21/8234 ,  H01L27/06 ,  H01L49/02 ,  H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165 ,  H01L29/16 ,  H01L29/24 ,  H01L29/267 ,  H01L21/205

CPC classification number: H01L27/0629 ,  H01L21/2053 ,  H01L21/76895 ,  H01L21/823431 ,  H01L23/535 ,  H01L28/20 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/66166 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device and method for fabricating such a device are presented. The semiconductor device includes a fin extending away from a substrate, a plurality of epitaxially grown regions disposed along a top surface of the fin, and at least two contacts that provide electrical contact to the fin. The plurality of epitaxially grown regions are arranged to alternate with regions having no epitaxial material grown on the top surface of the fin. A resistance exists between the two contacts that is at least partially based on the arrangement of the plurality of epitaxially grown regions.

公开(公告)号：US20170263602A1

公开(公告)日：2017-09-14

申请号：US15592256

申请日：2017-05-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hsin HU ,  Hsueh-Shih Fan ,  Huan-Tsung Huang

IPC: H01L27/06 ,  H01L29/16 ,  H01L21/768 ,  H01L29/66 ,  H01L23/535 ,  H01L49/02 ,  H01L29/78

CPC classification number: H01L27/0629 ,  H01L21/2053 ,  H01L21/76895 ,  H01L21/823431 ,  H01L23/535 ,  H01L28/20 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/66166 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device and method for fabricating such a device are presented. The semiconductor device includes a fin extending away from a substrate, a plurality of epitaxially grown regions disposed along a top surface of the fin, and at least two contacts that provide electrical contact to the fin. The plurality of epitaxially grown regions are arranged to alternate with regions having no epitaxial material grown on the top surface of the fin. A resistance exists between the two contacts that is at least partially based on the arrangement of the plurality of epitaxially grown regions.

公开(公告)号：US11621351B2

公开(公告)日：2023-04-04

申请号：US17306536

申请日：2021-05-03

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Hsin Hu ,  Huan-Tsung Huang

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08

Abstract: The present disclosure is generally directed to semiconductor structures and methods that improve breakdown characteristics in finFET device designs, while retaining cost effectiveness for integration into the process flow. The semiconductor structure includes an extended lightly-doped-drain (LDD) region formed on a source/drain structure. The extended LDD regions provide extra separation between source and drain regions, which in turn provides for an increased source to drain resistance. The increased source to drain resistance improves the breakdown voltage of the semiconductor device, and significantly reduces its susceptibility to latch-up. The source to drain resistance may be tuned by adjusting the length of epi block regions, and may also be tuned by selecting desired doping profiles for the LDD and source/drain regions. The length of epi block regions may also be adjusted to maintain high uniformity of epitaxial growth in the S/D regions.

公开(公告)号：US09812444B2

公开(公告)日：2017-11-07

申请号：US15592256

申请日：2017-05-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hsin Hu ,  Hsueh-Shih Fan ,  Huan-Tsung Huang

IPC: H01L29/66 ,  H01L27/06 ,  H01L49/02 ,  H01L29/78 ,  H01L23/535 ,  H01L21/768 ,  H01L29/161

CPC classification number: H01L27/0629 ,  H01L21/2053 ,  H01L21/76895 ,  H01L21/823431 ,  H01L23/535 ,  H01L28/20 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/66166 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device and method for fabricating such a device are presented. The semiconductor device includes a fin extending away from a substrate, a plurality of epitaxially grown regions disposed along a top surface of the fin, and at least two contacts that provide electrical contact to the fin. The plurality of epitaxially grown regions are arranged to alternate with regions having no epitaxial material grown on the top surface of the fin. A resistance exists between the two contacts that is at least partially based on the arrangement of the plurality of epitaxially grown regions.

公开(公告)号：US20170301785A1

公开(公告)日：2017-10-19

申请号：US15130205

申请日：2016-04-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Hsin HU ,  Huan-Tsung Huang

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/7848

Abstract: The present disclosure is generally directed to semiconductor structures and methods that improve breakdown characteristics in finFET device designs, while retaining cost effectiveness for integration into the process flow. The semiconductor structure includes an extended lightly-doped-drain (LDD) region formed on a source/drain structure. The extended LDD regions provide extra separation between source and drain regions, which in turn provides for an increased source to drain resistance. The increased source to drain resistance improves the breakdown voltage of the semiconductor device, and significantly reduces its susceptibility to latch-up. The source to drain resistance may be tuned by adjusting the length of epi block regions, and may also be tuned by selecting desired doping profiles for the LDD and source/drain regions. The length of epi block regions may also be adjusted to maintain high uniformity of epitaxial growth in the S/D regions.