公开(公告)号：US20230064078A1

公开(公告)日：2023-03-02

申请号：US17460699

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pin Chu Liang ,  Hung-Yao Chen ,  Pei-Ren Jeng

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L21/027

Abstract: A method includes depositing a first dielectric layer over and along sidewalls of a first semiconductor fin and a second semiconductor fin, depositing a second dielectric layer over the first dielectric layer, recessing the first dielectric layer to define a dummy fin between the first semiconductor fin and the second semiconductor fin, forming a cap layer over top surfaces and sidewalls of the first semiconductor fin and the second semiconductor fin, wherein the forming the cap layer comprises depositing the cap layer in a furnace at process temperatures higher than a first temperature, and lowering the temperature of the furnace, wherein during the lowering the temperature of the furnace, the pressure in the furnace is raised to and maintained at 10 torr or higher until the temperature of the furnace drops below the first temperature.

公开(公告)号：US12170228B2

公开(公告)日：2024-12-17

申请号：US18366864

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Yao Chen ,  Pin-Chu Liang ,  Hsueh-Chang Sung ,  Pei-Ren Jeng ,  Yee-Chia Yeo

IPC: H01L21/82 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092

Abstract: In an embodiment, a method includes forming a first fin and a second fin within an insulation material over a substrate, the first fin and the second fin includes different materials, the insulation material being interposed between the first fin and the second fin, the first fin having a first width and the second fin having a second width; forming a first capping layer over the first fin; and forming a second capping layer over the second fin, the first capping layer having a first thickness, the second capping layer having a second thickness different from the first thickness.

公开(公告)号：US20230317831A1

公开(公告)日：2023-10-05

申请号：US18331355

申请日：2023-06-08

Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.

Inventor： Pin Chu Liang ,  Hung-Yao Chen ,  Pei-Ren Jeng

IPC: H01L29/66 ,  H01L21/027 ,  H01L29/78 ,  H01L21/02

CPC classification number: H01L29/6681 ,  H01L29/66636 ,  H01L21/0274 ,  H01L29/7855 ,  H01L21/02532

Abstract: A method includes depositing a first dielectric layer over and along sidewalls of a first semiconductor fin and a second semiconductor fin, depositing a second dielectric layer over the first dielectric layer, recessing the first dielectric layer to define a dummy fin between the first semiconductor fin and the second semiconductor fin, forming a cap layer over top surfaces and sidewalls of the first semiconductor fin and the second semiconductor fin, wherein the forming the cap layer comprises depositing the cap layer in a furnace at process temperatures higher than a first temperature, and lowering the temperature of the furnace, wherein during the lowering the temperature of the furnace, the pressure in the furnace is raised to and maintained at 10 torr or higher until the temperature of the furnace drops below the first temperature.

公开(公告)号：US11710781B2

公开(公告)日：2023-07-25

申请号：US17460699

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pin Chu Liang ,  Hung-Yao Chen ,  Pei-Ren Jeng

IPC: H01L21/02 ,  H01L29/66 ,  H01L21/027 ,  H01L29/78

CPC classification number: H01L29/6681 ,  H01L21/0274 ,  H01L21/02532 ,  H01L29/66636 ,  H01L29/7855

Abstract: A method includes depositing a first dielectric layer over and along sidewalls of a first semiconductor fin and a second semiconductor fin, depositing a second dielectric layer over the first dielectric layer, recessing the first dielectric layer to define a dummy fin between the first semiconductor fin and the second semiconductor fin, forming a cap layer over top surfaces and sidewalls of the first semiconductor fin and the second semiconductor fin, wherein the forming the cap layer comprises depositing the cap layer in a furnace at process temperatures higher than a first temperature, and lowering the temperature of the furnace, wherein during the lowering the temperature of the furnace, the pressure in the furnace is raised to and maintained at 10 torr or higher until the temperature of the furnace drops below the first temperature.

公开(公告)号：US20250063807A1

公开(公告)日：2025-02-20

申请号：US18937551

申请日：2024-11-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Yao Chen ,  Pin-Chu Liang ,  Hsueh-Chang Sung ,  Pei-Ren Jeng ,  Yee-Chia Yeo

IPC: H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092

Abstract: In an embodiment, a method includes forming a first fin and a second fin within an insulation material over a substrate, the first fin and the second fin includes different materials, the insulation material being interposed between the first fin and the second fin, the first fin having a first width and the second fin having a second width; forming a first capping layer over the first fin; and forming a second capping layer over the second fin, the first capping layer having a first thickness, the second capping layer having a second thickness different from the first thickness.

公开(公告)号：US11677015B2

公开(公告)日：2023-06-13

申请号：US17109895

申请日：2020-12-02

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ya-Wen Chiu ,  Yi Che Chan ,  Lun-Kuang Tan ,  Zheng-Yang Pan ,  Cheng-Po Chau ,  Pin-Ju Liang ,  Hung-Yao Chen ,  De-Wei Yu ,  Yi-Cheng Li

IPC: H01L21/8238 ,  H01L29/66 ,  H01L27/092 ,  H01L29/78 ,  H01L29/161 ,  H01L29/10 ,  H01L21/02

CPC classification number: H01L29/66818 ,  H01L21/0262 ,  H01L21/02532 ,  H01L21/02661 ,  H01L21/823807 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/1037 ,  H01L29/161 ,  H01L29/6681 ,  H01L29/7851

Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.

公开(公告)号：US11948840B2

公开(公告)日：2024-04-02

申请号：US17462818

申请日：2021-08-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Yao Chen ,  Pin-Chu Liang ,  Hsueh-Chang Sung ,  Pei-Ren Jeng ,  Yee-Chia Yeo

IPC: H01L21/82 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092

CPC classification number: H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924

Abstract: In an embodiment, a method includes forming a first fin and a second fin within an insulation material over a substrate, the first fin and the second fin includes different materials, the insulation material being interposed between the first fin and the second fin, the first fin having a first width and the second fin having a second width; forming a first capping layer over the first fin; and forming a second capping layer over the second fin, the first capping layer having a first thickness, the second capping layer having a second thickness different from the first thickness.

公开(公告)号：US20230402326A1

公开(公告)日：2023-12-14

申请号：US18366864

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Yao Chen ,  Pin-Chu Liang ,  Hsueh-Chang Sung ,  Pei-Ren Jeng ,  Yee-Chia Yeo

IPC: H01L21/8234 ,  H01L27/092 ,  H01L27/088 ,  H01L21/8238

CPC classification number: H01L21/823431 ,  H01L27/0924 ,  H01L27/0886 ,  H01L21/823821

Abstract: In an embodiment, a method includes forming a first fin and a second fin within an insulation material over a substrate, the first fin and the second fin includes different materials, the insulation material being interposed between the first fin and the second fin, the first fin having a first width and the second fin having a second width; forming a first capping layer over the first fin; and forming a second capping layer over the second fin, the first capping layer having a first thickness, the second capping layer having a second thickness different from the first t

公开(公告)号：US20230064844A1

公开(公告)日：2023-03-02

申请号：US17462818

申请日：2021-08-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Yao Chen ,  Pin-Chu Liang ,  Hsueh-Chang Sung ,  Pei-Ren Jeng ,  Yee-Chia Yeo

IPC: H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092

Abstract: In an embodiment, a method includes forming a first fin and a second fin within an insulation material over a substrate, the first fin and the second fin includes different materials, the insulation material being interposed between the first fin and the second fin, the first fin having a first width and the second fin having a second width; forming a first capping layer over the first fin; and forming a second capping layer over the second fin, the first capping layer having a first thickness, the second capping layer having a second thickness different from the first thickness.