VERTEX-BASED OPC FOR OPENING PATTERNING

    公开(公告)号:US20210240087A1

    公开(公告)日:2021-08-05

    申请号:US17144975

    申请日:2021-01-08

    Inventor: Shinn-Sheng YU

    Abstract: A method of enhancing a layout pattern includes determining a target layout pattern comprising a disk shape pattern associated with an opening. The method includes defining a polygon having a plurality of vertices on the disk shape pattern. The plurality of vertices coincide with a boundary of the disk shape pattern and the polygon is an initial layout pattern of the opening. The method includes performing an iterative correction of the initial layout pattern. The iterative correction includes projecting the layout pattern of the opening onto a substrate, determining an error between the target layout pattern and the projected layout pattern, and adjusting the layout pattern by moving the vertices of the polygon to generate a next iteration of the layout pattern. The method includes continuing the adjusting, projecting, and determining until a criterion is satisfied and a final iteration of the layout pattern of the opening is generated.

    PHOTOLITHOGRAPHY METHOD AND APPARATUS
    2.
    发明申请

    公开(公告)号:US20200057375A1

    公开(公告)日:2020-02-20

    申请号:US16534965

    申请日:2019-08-07

    Abstract: An extreme ultraviolet lithography (EUVL) method includes providing at least two phase-shifting mask areas having a same pattern. A resist layer is formed over a substrate. An optimum exposure dose of the resist layer is determined, and a latent image is formed on a same area of the resist layer by a multiple exposure process. The multiple exposure process includes a plurality of exposure processes and each of the plurality of exposure processes uses a different phase-shifting mask area from the at least two phase-shifting mask areas having a same pattern.

    METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND APPARATUS FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

    公开(公告)号:US20200041915A1

    公开(公告)日:2020-02-06

    申请号:US16525510

    申请日:2019-07-29

    Abstract: A method of manufacturing a semiconductor device includes dividing a number of dies along an x axis in a die matrix in each exposure field in an exposure field matrix delineated on the semiconductor substrate, wherein the x axis is parallel to one edge of a smallest rectangle enclosing the exposure field matrix. A number of dies is divided along a y axis in the die matrix, wherein the y axis is perpendicular to the x axis. Sequences SNx0, SNx1, SNx, SNxr, SNy0, SNy1, SNy, and SNyr are formed. p*(Nbx+1)−2 stepping operations are performed in a third direction and first sequence exposure/stepping/exposure operations and second sequence exposure/stepping/exposure operations are performed alternately between any two adjacent stepping operations as well as before a first stepping operation and after a last stepping operation. A distance of each stepping operation in order follows the sequence SNx.

    MASK MAKING METHOD
    4.
    发明申请
    MASK MAKING METHOD 审中-公开

    公开(公告)号:US20200004135A1

    公开(公告)日:2020-01-02

    申请号:US16453463

    申请日:2019-06-26

    Abstract: A method of making a mask includes computing a transmission cross coefficient (TCC) matrix for an optical system for performing a lithography process, wherein computing includes decomposing the transmission cross coefficient matrix into an ideal transmission cross coefficient (TCC) kernel set for a corresponding ideal optical system and at least one perturbation kernel set with coefficients corresponding to optical defects in the optical system, calibrating a lithography model by iteratively adjusting the lithography model based on a comparison between simulated wafer patterns and measured printed wafer patterns, and providing the calibrated lithography model, which includes an ideal TCC kernel set and the at least two perturbation kernels sets and a resist model, to a mask layout synthesis tool to obtain a synthesized mask layout corresponding to a target mask layout for manufacturing the mask using the synthesized mask layout.

    METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND APPARATUS FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

    公开(公告)号:US20210096475A1

    公开(公告)日:2021-04-01

    申请号:US17121542

    申请日:2020-12-14

    Abstract: A method of manufacturing a semiconductor device includes dividing a number of dies along an x axis in a die matrix in each exposure field in an exposure field matrix delineated on the semiconductor substrate, wherein the x axis is parallel to one edge of a smallest rectangle enclosing the exposure field matrix. A number of dies is divided along a y axis in the die matrix, wherein the y axis is perpendicular to the x axis. Sequences SNx0, SNx1, SNx, SNxr, SNy0, SNy1, SNy, and SNyr are formed. p*(Nbx+1)−2 stepping operations are performed in a third direction and first sequence exposure/stepping/exposure operations and second sequence exposure/stepping/exposure operations are performed alternately between any two adjacent stepping operations as well as before a first stepping operation and after a last stepping operation. A distance of each stepping operation in order follows the sequence SNx.

Patent Agency Ranking