-
公开(公告)号：US20240390861A1
公开(公告)日：2024-11-28
申请号：US18789443
申请日：2024-07-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Tzu-Ang Chao , Gregory Michael Pitner , Tse-An Chen , Lain-Jong Li , Yu Chao Lin
IPC: B01D67/00 , H01L21/02 , H01L29/06 , H01L29/40 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786 , H10K10/46 , H10K10/84 , H10K71/00 , H10K71/12 , H10K85/20
Abstract: A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.
-
公开(公告)号：US12151213B2
公开(公告)日：2024-11-26
申请号：US18356636
申请日：2023-07-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Tzu-Ang Chao , Gregory Michael Pitner , Tse-An Chen , Lain-Jong Li , Yu Chao Lin
IPC: H01L21/02 , B01D67/00 , H01L29/06 , H01L29/40 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786 , H10K10/46 , H10K10/84 , H10K71/00 , H10K71/12 , H10K85/20
Abstract: A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.
-
公开(公告)号：US11342181B2
公开(公告)日：2022-05-24
申请号：US17071554
申请日：2020-10-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Tzu-Ang Chao , Gregory Michael Pitner , Tse-An Chen , Lain-Jong Li , Yu Chao Lin
IPC: H01L21/02 , H01L29/06 , H01L51/00 , H01L29/78 , H01L29/423 , H01L29/40 , H01L29/66 , H01L51/05 , H01L51/56 , H01L51/10 , H01L29/786
Abstract: A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.
-
公开(公告)号：US11158807B2
公开(公告)日：2021-10-26
申请号：US16656583
申请日：2019-10-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Timothy Vasen , Chao-Ching Cheng , Matthias Passlack , Martin Christopher Holland , Tse-An Chen , Lain-Jong Li
Abstract: A field effect transistor includes a semiconductor substrate, a first pad layer, carbon nanotubes and a gate structure. The first pad layer is disposed over the semiconductor substrate and comprises a 2D material. The carbon nanotubes are disposed over the first insulating pad layer. The gate structure is disposed over the semiconductor substrate and is vertically stacked with the carbon nanotubes. The carbon nanotubes extend from one side to an opposite side of the gate structure.
-
公开(公告)号：US11094811B2
公开(公告)日：2021-08-17
申请号：US16389659
申请日：2019-04-19
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Tse-An Chen , Lain-Jong Li , Wen-Hao Chang , Chien-Chih Tseng
Abstract: A semiconductor device includes a substrate, a channel layer, an insulating layer, source/drain contacts, a gate dielectric layer, and a gate electrode. The channel layer over the substrate and includes two dimensional (2D) material. The insulating layer is on the channel layer. The source/drain contacts are over the channel layer. The gate dielectric layer is over the insulating layer and the channel layer. The gate electrode is over the gate dielectric layer and between the source/drain contacts.
-
Patent Agency Ranking
公开(公告)号：US20250133778A1
公开(公告)日：2025-04-24
申请号：US18982482
申请日：2024-12-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yi-Tse Hung , Chao-Ching Cheng , Tse-An Chen , Hung-Li Chiang , Tzu-Chiang Chen , Lain-Jong Li
Abstract: A method includes: forming a dielectric fin protruding above a substrate; forming a channel layer over an upper surface of the dielectric fin and along first sidewalls of the dielectric fin, the channel layer including a low dimensional material; forming a gate structure over the channel layer; forming metal source/drain regions on opposing sides of the gate structure; forming a channel enhancement layer over the channel layer; and forming a passivation layer over the gate structure, the metal source/drain regions, and the channel enhancement layer.
-
公开(公告)号：US12211931B2
公开(公告)日：2025-01-28
申请号：US17814620
申请日：2022-07-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yi-Tse Hung , Chao-Ching Cheng , Tse-An Chen , Hung-Li Chiang , Tzu-Chiang Chen , Lain-Jong Li
Abstract: A method includes: forming a dielectric fin protruding above a substrate; forming a channel layer over an upper surface of the dielectric fin and along first sidewalls of the dielectric fin, the channel layer including a low dimensional material; forming a gate structure over the channel layer; forming metal source/drain regions on opposing sides of the gate structure; forming a channel enhancement layer over the channel layer; and forming a passivation layer over the gate structure, the metal source/drain regions, and the channel enhancement layer.
-
公开(公告)号：US11245024B2
公开(公告)日：2022-02-08
申请号：US16844809
申请日：2020-04-09
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. , NATIONAL TAIWAN UNIVERSITY , NATIONAL TAIWAN NORMAL UNIVERSITY
Inventor： Tung-Ying Lee , Tse-An Chen , Tzu-Chung Wang , Miin-Jang Chen , Yu-Tung Yin , Meng-Chien Yang
IPC: H01L21/28 , H01L29/49 , H01L29/51 , H01L29/78 , H01L29/66 , H01L29/786 , H01L29/06 , H01L29/423 , H01L21/02
Abstract: A method of manufacturing a semiconductor device includes forming a fin structure comprising alternately stacked first semiconductor layers and second semiconductor layers over a substrate. A sacrificial gate structure is formed over the fin structure. Spacers are formed on either side of the sacrificial gate structure. The sacrificial gate structure is removed to form a trench between the spacers. The first semiconductor layers are removed from the trench, while leaving the second semiconductor layers suspended in the trench. A self-assembling monolayer is formed on sidewalls of the spacers in the trench. Interfacial layers are formed encircling the suspended second semiconductor layers, respectively. A high-k dielectric layer is deposited at a faster deposition rate on the interfacial layers than on the self-assembling monolayer. A metal gate structure is formed over the high-k dielectric layer.
-
公开(公告)号：US20210358750A1
公开(公告)日：2021-11-18
申请号：US17071554
申请日：2020-10-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Tzu-Ang Chao , Gregory Michael Pitner , Tse-An Chen , Lain-Jong Li , Yu Chao Lin
Abstract: A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduced the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.
-
公开(公告)号：US20210119131A1
公开(公告)日：2021-04-22
申请号：US16656583
申请日：2019-10-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Timothy Vasen , Chao-Ching Cheng , Matthias Passlack , Martin Christopher Holland , Tse-An Chen , Lain-Jong Li
Abstract: A field effect transistor includes a semiconductor substrate, a first pad layer, carbon nanotubes and a gate structure. The first pad layer is disposed over the semiconductor substrate and comprises a 2D material. The carbon nanotubes are disposed over the first insulating pad layer. The gate structure is disposed over the semiconductor substrate and is vertically stacked with the carbon nanotubes. The carbon nanotubes extend from one side to an opposite side of the gate structure.
-
-
-
-
-
-
-
-
-
Search Results
25
records
(took 0.02 seconds)
