公开(公告)号：US20190287851A1

公开(公告)日：2019-09-19

申请号：US15920727

申请日：2018-03-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pin-Wen CHEN ,  Chia-Han LAI ,  Chih-Wei CHANG ,  Mei-Hui FU ,  Ming-Hsing TSAI ,  Wei-Jung LIN ,  Yu Shih WANG ,  Ya-Yi CHENG ,  I-Li CHEN

IPC: H01L21/768 ,  H01L23/535 ,  H01L21/285 ,  H01L21/3213

Abstract: The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In some embodiments, a structure includes a first dielectric layer over a substrate, a first conductive feature through the first dielectric layer, the first conductive feature comprising a first metal, a second dielectric layer over the first dielectric layer, and a second conductive feature through the second dielectric layer having a lower convex surface extending into the first conductive feature, wherein the lower convex surface of the second conductive feature has a tip end extending laterally under a bottom boundary of the second dielectric layer.

公开(公告)号：US20250066899A1

公开(公告)日：2025-02-27

申请号：US18454702

申请日：2023-08-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Yen LIAO ,  I. LEE ,  Shu-Lan CHANG ,  Sheng-Hsuan LIN ,  Feng-Yu CHANG ,  Wei-Jung LIN ,  Chun-I TSAI ,  Chih-Chien CHI ,  Ming-Hsing TSAI ,  Pei Shan CHANG ,  Chih-Wei CHANG

IPC: C23C14/04 ,  C23C14/34 ,  C23C14/50 ,  C23C14/54 ,  C23C14/58

Abstract: A method includes: positioning a wafer on an electrostatic chuck of a physical vapor deposition apparatus, the wafer including an opening exposing a conductive feature; setting a temperature of the wafer to a room temperature; forming a tungsten thin film in the opening by the physical vapor deposition apparatus, the tungsten thin film including a bottom portion that is on an upper surface of the conductive feature exposed by the opening, a top portion that is on an upper surface of a dielectric layer through which the opening extends and a sidewall portion that is on a sidewall of the dielectric layer exposed by the opening; removing the top portion and the sidewall portion of the tungsten thin film from over the opening; and forming a tungsten plug in the opening on the bottom portion by selectively depositing tungsten by a chemical vapor deposition operation.

公开(公告)号：US20190273147A1

公开(公告)日：2019-09-05

申请号：US15909838

申请日：2018-03-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wen CHENG ,  Cheng-Tung LIN ,  Chih-Wei CHANG ,  Hong-Mao LEE ,  Ming-Hsing TSAI ,  Sheng-Hsuan LIN ,  Wei-Jung LIN ,  Yan-Ming TSAI ,  Yu-Shiuan WANG ,  Hung-Hsu CHEN ,  Wei-Yip LOH ,  Ya-Yi CHENG

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/45 ,  H01L21/768 ,  H01L21/02 ,  H01L21/326 ,  H01L29/78

Abstract: Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.

公开(公告)号：US20190164823A1

公开(公告)日：2019-05-30

申请号：US15880448

申请日：2018-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu Shih WANG ,  Chun-I TSAI ,  Shian Wei MAO ,  Ken-Yu CHANG ,  Ming-Hsing TSAI ,  Wei-Jung LIN

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/3213

CPC classification number: H01L21/76847 ,  H01L21/32134 ,  H01L21/76846 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266

Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a barrier layer is formed along a sidewall. A portion of the barrier layer along the sidewall is etched back. After etching back the portion of the barrier layer, an upper portion of the barrier layer along the sidewall is smoothed. A conductive material is formed along the barrier layer and over the smoothed upper portion of the barrier layer.